Abstract
This paper presents silicon quantum dot channel (QDC) field effect transistors (FETs) and floating gate nonvolatile memory structures. The QDC-FET operation is explained by carrier transport in narrow mini-energy bands which are manifested in an array of SiO x -cladded silicon quantum dot layers. For nonvolatile memory structures, simulations of electron charge densities in the floating quantum dot layers are presented. Experimental threshold voltage shift in I D–V G characteristics is presented after the ‘Write’ cycle. The QDC-FETs and nonvolatile memory due to improved threshold voltage variations by incorporating the lattice-matched II–VI layer as the gate insulator.
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Kondo, J., Lingalugari, M., Chan, PY. et al. Quantum Dot Channel (QDC) Field Effect Transistors (FETs) and Floating Gate Nonvolatile Memory Cells. J. Electron. Mater. 44, 3188–3193 (2015). https://doi.org/10.1007/s11664-015-3895-1
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DOI: https://doi.org/10.1007/s11664-015-3895-1