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Parallelized deblocking filtering of HEVC decoders based on complexity estimation

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Abstract

This paper proposes a parallelization method for a deblocking filter in a high-efficiency video coding (HEVC) decoder based on complexity estimation. A deblocking filter of HEVC is generally considered to be appropriate for data-level parallelism (DLP) because there are no data-level dependencies among adjacent blocks in the horizontal and vertical filtering processes. However, an imbalanced workload can increase the idle time on some of the threads, and thus, the maximum parallel performance cannot be achieved with only DLP. To alleviate this problem, the proposed method estimates the computational complexity by utilizing the coding unit (CU) segment information and the on/off flag of the deblocking filter in advance. Then, the workload is distributed equally across all threads. The experimental results indicate that the proposed method can accelerate the decoding speed by a factor of 3.97, with six threads on top of the sequential deblocking filtering. In addition, the ratio of the maximum elapsed time to ideal elapsed time is reduced to approximately 21 %, as compared to conventional DLP-based parallel deblocking filtering methods that do not implement a complexity estimation method.

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Acknowledgments

This research was supported by the Commercializations Promotion Agency for R&D Outcomes (COMPA) funded by the Ministry of Science, ICT and Future Planning (MISP) and Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning (NRF-2014R1A2A1A11052210).

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Correspondence to Donggyu Sim.

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Jo, H., Park, S. & Sim, D. Parallelized deblocking filtering of HEVC decoders based on complexity estimation. J Real-Time Image Proc 12, 369–382 (2016). https://doi.org/10.1007/s11554-015-0556-9

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