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A 24–28 GHz high-stability CMOS power amplifier using common-gate-shorting (CGS) technique with 17.5 dBm \({\hbox {P}}_{sat}\) and 16.3% PAE for 5G millimeter-wave applications

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Abstract

This paper presents a 24–28 GHz high-stability millimeter-wave power amplifier (PA) implemented in low-cost \(0.13\, \upmu \hbox {m}\) CMOS process. The PA consists of two cascode stages with passive transformer-based input and output baluns. The common-gate-shorting technique is proposed for high-stability and high-gain millimeter-wave cascode stage. To realize this technique, an interdigited powercell structure is adopted for MOS layout optimization. In order to improve \(\hbox {P}_{out}\) and PAE, an inter-stage inductor is introduced. The proposed PA achieves a PAE over 16.3% with a saturated output power of 17.5 dBm. The maximum gain is 21.2 dB at 26 GHz.

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Acknowledgements

The author would like to thank the chip fabrication support from GlobalFoundries China top university program. The authors would also like to thank the measurement help of Jian Zhang, Rui Tong and Xiaowei Sun from Shanghai Institute of Microsystem and Information Technology (SIMIT). Funding was provided by National Natural Science Foundation of China (Grant No. 61306034).

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Authors and Affiliations

  1. Institute of Microelectronic Circuits and Systems, East China Normal University, Shanghai, China

    Chunshen Jiang, Runxi Zhang & Chunqi Shi

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  1. Chunshen Jiang
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  2. Runxi Zhang
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  3. Chunqi Shi
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Correspondence to Runxi Zhang.

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Jiang, C., Zhang, R. & Shi, C. A 24–28 GHz high-stability CMOS power amplifier using common-gate-shorting (CGS) technique with 17.5 dBm \({\hbox {P}}_{sat}\) and 16.3% PAE for 5G millimeter-wave applications. Analog Integr Circ Sig Process 98, 193–200 (2019). https://doi.org/10.1007/s10470-018-1350-y

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  • DOI: https://doi.org/10.1007/s10470-018-1350-y

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