Learning capacitive weights in analog CMOS neural networks H. C. CardC. R. SchneiderR. S. Schneider OriginalPaper 01 October 1994 Pages: 209 - 225
Self-tuned continuous-time notch filters Calvin PlettMiles A. Copeland OriginalPaper 01 October 1994 Pages: 227 - 240
A floating-point systolic array processing element with serial communication and built-in self-test T. C. DaviesD. Al-KhaliliV. Szwarc OriginalPaper 01 October 1994 Pages: 241 - 251
A chip set for pipeline and parallel pipeline FFT architectures V. SzwarcL. DesormeauxT. A. Kwasniewski OriginalPaper 01 October 1994 Pages: 253 - 265
Testing of programmable analog neural network chips Sudhir M. GowdaBing J. SheuWen -Jay Hsu OriginalPaper 01 October 1994 Pages: 267 - 282
Implementing the square-root information Kalman filter on a Jacobi-type systolic array Marc Moonen OriginalPaper 01 October 1994 Pages: 283 - 291
On fault tolerant matrix decomposition Patrick Fitzpatrick OriginalPaper 01 October 1994 Pages: 293 - 303
A fast VLSI systolic array for large modulus residue addition S. BandyopadhyayG. A. JullienA. Sengupta OriginalPaper 01 October 1994 Pages: 305 - 318