Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks R. GovindarajanGuang R. GaoPalash Desai OriginalPaper 01 July 2002 Pages: 207 - 229
An Efficient VLSI Architecture for the Computation of 1-D Discrete Wavelet Transform A.B. PremkumarA.S. Madhukumar OriginalPaper 01 July 2002 Pages: 231 - 241
Synthesis and Optimization of Combinational Interface Circuits Ki-Seok ChungRajesh K. GuptaC.L. Liu OriginalPaper 01 July 2002 Pages: 243 - 261
The Flagged Prefix Adder and its Applications in Integer Arithmetic Neil Burgess OriginalPaper 01 July 2002 Pages: 263 - 271