Reducing Library Characterization Time for Cell-aware Test while Maintaining Test Quality Zhan GaoMin-Chun HuErik Jan Marinissen OriginalPaper Open access 26 May 2021 Pages: 161 - 189
A Low-Cost, Robust and Tolerant, Digital Scheme for Post-Bond Testing and Diagnosis of TSVs Vasileios GerakisYiorgos TsiatouhasAlkis Hatzopoulos OriginalPaper 14 April 2021 Pages: 191 - 203
A Cascaded Multicasting Architecture for Test Data Compression Wang-Dauh Tseng OriginalPaper 19 March 2021 Pages: 205 - 214
Fault Diagnosis Method of Low Noise Amplifier Based on Support Vector Machine and Hidden Markov Model Lu SunYang LiFushun Nian OriginalPaper 03 June 2021 Pages: 215 - 223
Evaluation of a Two-Tier Adaptive Indirect Test Flow for a Front-End RF Circuit H. El BadawiF. AzaisF. Lefevre OriginalPaper 06 March 2021 Pages: 225 - 242
Tolerating Soft Errors with Horizontal-Vertical-Diagonal-N-Queen (HVDNQ) Parity Muhammad Sheikh SadiSumaiya SumaiyaAtikur Rahman OriginalPaper 03 May 2021 Pages: 243 - 254
Radiation Tolerant SRAM Cell Design in 65nm Technology JianAn WangXue WuLi Chen OriginalPaper 23 April 2021 Pages: 255 - 262
Soft Errors Sensitivity of SRAM Cells in Hold, Write, Read and Half-Selected Conditions Cleiton Magano MarquesCristina MeinhardtPaulo Francisco Butzen OriginalPaper 06 May 2021 Pages: 263 - 270
Single Event Upset Evaluation for a 28-nm FDSOI SRAM Type Buffer in an ARM Processor Shuting ShiRui ChenLi Chen OriginalPaper 31 March 2021 Pages: 271 - 278
Method of Implanting Hardware Trojan Based on EHW in Part of Circuit Lijun LiuTao WangXiaohan Wang OriginalPaper 01 April 2021 Pages: 279 - 284
