1. Editorial

   • V.D. Agrawal

   Editorial Board Pages: 495 - 495

2. Test Technology Technical Council Newsletter

   • André Ivanov

   Legacy Pages: 497 - 498

3. Guest Editorial

   • Cecilia Metra
   • Matteo Sonza Reorda

   Editorial Board Pages: 499 - 499

4. On-Line Techniques for Error Detection and Correction in Processor Registers with Cross-Parity Check

   • M. Pflanz
   • K. Walther
   • H.T. Vierhaus

   OriginalPaper Pages: 501 - 510

5. Error Correcting Strategy for High Speed and High Density Reliable Flash Memories

   • D. Rossi
   • C. Metra

   OriginalPaper Pages: 511 - 521

6. An Architecture for Self-Healing Digital Systems

   • P.K. Lala
   • B. Kiran Kumar

   OriginalPaper Pages: 523 - 535

7. On-Line Monitor Design of Finite-State Machines

   • Feng Gao
   • John P. Hayes

   OriginalPaper Pages: 537 - 548

8. BIST-Based Delay-Fault Testing in FPGAs

   • Miron Abramovici
   • Charles E. Stroud

   OriginalPaper Pages: 549 - 558

9. Multi-Level Fault Injections in VHDL Descriptions: Alternative Approaches and Experiments

   • R. Leveugle
   • K. Hadjiat

   OriginalPaper Pages: 559 - 575

10. Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor

    • M. Rebaudengo
    • M. Sonza Reorda
    • M. Violante

    OriginalPaper Pages: 577 - 584

11. A Statistical Sampler for a New On-Line Analog Test Method

    • Marcelo Negreiros
    • Luigi Carro
    • Altamiro A. Susin

    OriginalPaper Pages: 585 - 595

12. A BICS for CMOS OpAmps by Monitoring the Supply Current Peak

    • J. Font
    • J. Ginard
    • E. García

    OriginalPaper Pages: 597 - 603