FTL algorithms for NAND-type flash memories Se Jin KwonArun RanjitkarTae-Sun Chung OriginalPaper 09 March 2011 Pages: 191 - 224
Enhancing IP cores specifications using hierarchical composition and set theory Cássio L. RodriguesKarina R. G. da SilvaElmar Melcher OriginalPaper 08 April 2011 Pages: 225 - 245
FPGA automatic re-synchronisation for pipelined, floating point control systems applications Beniamin ApopeiTony J. Dodd OriginalPaper 09 June 2011 Pages: 247 - 288
HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors Mostafa KishaniHamid R. ZarandiBehnam Ghavami OriginalPaper 15 May 2011 Pages: 289 - 310
A retargetable framework for compiler/architecture co-development Hanno ScharwaechterDavid KammlerHeinrich Meyr OriginalPaper 08 October 2011 Pages: 311 - 342