A 1.1-mW 10-bit 50-MSample/s hybrid two-step ADC in 0.13-µm CMOS technology Ilseop LeeMyonglae ChuByung-geun Lee OriginalPaper 08 December 2016 Pages: 273 - 281
High-speed single cable synchronization system for data-converters Nico De ClercqRobin TheunisWim Dehaene OriginalPaper 21 December 2016 Pages: 283 - 290
A wide-band high-accuracy incremental ADC Youngho JungGabor C. Temes OriginalPaper 21 December 2016 Pages: 291 - 299
A new CMOS comparator robust to process and temperature variations for SAR ADC converters Gisela de La Fuente-CortesGuillermo Espinosa Flores-VerdadA. Diaz-Mendez OriginalPaper 09 January 2017 Pages: 301 - 308
Optimum design of a double-tail latch comparator on power, speed, offset and size Ehsan YaqubiSeyed Hamid Zahiri OriginalPaper 21 December 2016 Pages: 309 - 319
A low power reconfigurable multi-mode continuous time Delta Sigma modulator for seven different mobile standards with VCO-based quantizer Asghar CharminEsmaeil Najafi Aghdam OriginalPaper 23 December 2016 Pages: 321 - 331
System simulations of a 1.5 V SiGe 81–86 GHz E-band transmitter Tobias TiredPer SandrupHenrik Sjöland OriginalPaper Open access 31 December 2016 Pages: 333 - 349
A high-efficiency narrow-band class-F power amplifier integrated with a microstrip suppressing cell Mohsen HayatiFarzin Shama OriginalPaper 21 December 2016 Pages: 351 - 359
Multilevel outphasing system using six-port modulators and doherty power amplifiers Hamidreza MoazzenAbbas MohammadiRashid Mirzavand OriginalPaper 20 December 2016 Pages: 361 - 372
Analysis of inverse E class power amplifier with finite DC feed in sub-nominal condition Sina SeifiHossein Miar-Naimi OriginalPaper 24 December 2016 Pages: 373 - 381
CMOS harmonic upconverter with power management of \(2{\bf nd}\) harmonic for wideband short-range communications Alejandro Israel Bautista-CastilloLuis Abraham Sánchez-GasparianoAlejandro Díaz-Sánchez OriginalPaper 03 December 2016 Pages: 383 - 388
Stochastic gradient descent analysis for the evaluation of a speaker recognition Ashrf NasefMarina Marjanović-JakovljevićAngelina Njeguš OriginalPaper 31 December 2016 Pages: 389 - 397
An edge-based dual adaptive decision feedback equalizer for Gbps serial links Alaa R. AL-TaeeMatthew DolanFei Yuan OriginalPaper 25 July 2016 Pages: 399 - 409
Design of a single-ended energy efficient data-dependent-write-assist dynamic (DDWAD) SRAM cell for improved stability and reliability Ajay Kumar SinghMohammadsadegh SaadatziC. Venkataseshaiah OriginalPaper 26 August 2016 Pages: 411 - 426
A wide frequency range delay line for fast-locking and low power delay-locked-loops Motahhareh EstebsariMohammad GholamiMohammad Javad Ghahramanpour OriginalPaper 29 July 2016 Pages: 427 - 434
Delay analysis of buffer inserted sub-threshold interconnects Rohit DhimanRajeevan Chandel OriginalPaper 09 September 2016 Pages: 435 - 445
Variation range based simplification for meaningful symbolic analysis of analog integrated circuits Mohammad ShokouhifarAli Jalali OriginalPaper 13 September 2016 Pages: 447 - 461
Application of the Crank–Nicolson FDTD method for analysis of a wideband multi-section hybrid coupler Shahrooz Asadi OriginalPaper 29 November 2016 Pages: 463 - 470
Floating memristor emulator with subthreshold region Yunus BabacanFırat Kaçar OriginalPaper 25 November 2016 Pages: 471 - 475
CMOS substrate coupling modeling and analysis flow for submicron SoC design T. NoulisP. Baumgartner Mixed Signal Letter 12 November 2016 Pages: 477 - 485
A novel low order delta–sigma modulator without harmonic distortion Vilem KledrowetzMarian PristachVojtech Dvorak Mixed Signal Letter 17 November 2016 Pages: 487 - 497
A wideband BiCMOS variable gain amplifier with novel continuous dB-linear gain control and temperature compensation Zheng Hao LuXiao Peng YuKiat-Seng Yeo Mixed Signal Letter 01 December 2016 Pages: 499 - 506
Energy-efficient switching scheme for ultra-low voltage SAR ADC Aidong WuJianhui WuJun Huang Mixed Signal Letter 28 November 2016 Pages: 507 - 511