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Analog and RF Performance Evaluation of Junctionless Accumulation Mode (JAM) Gate Stack Gate All Around (GS-GAA) FinFET

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Abstract

This work presents the analog and RF performance evaluation of Junctionless Accumulation Mode (JAM) Gate Stack Gate All Around (GS-GAA) FinFET, and the results acquired have been compared with conventional FinFET and GAA FinFET. It has been observed that in comparison to conventional FinFET, leakage current (Ioff) reduces by almost thirty times for the GS-GAA FinFET configuration. Thus, revamping the threshold voltage (Vth), switching ratio (Ion/Ioff), and subthreshold slope (SS) of the proposed device. Also, major analog parameters like transconductance (gm), transconductance generation factor (TGF) enhances considerably with early voltage (VEA) and intrinsic gain (Av) increased by over two times in magnitude for the GS-GAA FinFET configuration. Furthermore, several important RF parameters have been explored, and the outcome of the study is that the GS-GAA FinFET configuration shows superior RF performance. In GS-GAA FinFET configuration, the gain frequency product (GFP) and gain transconductance frequency product (GTFP) amplified by over two times in magnitude with minimal decrease in the cut-off frequency (fT) and maximum oscillation frequency (fmax). Thus, the proposed GS-GAA FinFET device can be looked upon as an appealing option for high-frequency analog/RF applications.

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Acknowledgments

The authors are grateful to the Microelectronics Research Laboratory, Delhi Technological University, for supporting the work.

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  1. Department of Applied Physics, Delhi Technological University, Delhi, India

    Bhavya Kumar & Rishu Chaujar

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  1. Bhavya Kumar
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Correspondence to Rishu Chaujar.

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Kumar, B., Chaujar, R. Analog and RF Performance Evaluation of Junctionless Accumulation Mode (JAM) Gate Stack Gate All Around (GS-GAA) FinFET. Silicon 13, 919–927 (2021). https://doi.org/10.1007/s12633-020-00910-7

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