Skip to main content
Log in

Relative Study of Analog Performance, Linearity, and Harmonic Distortion Between Junctionless and Conventional SOI FinFETs at Elevated Temperatures

  • Published:
Journal of Electronic Materials Aims and scope Submit manuscript

Abstract

This paper reports a comparative study of the analog performance, linearity and harmonic distortion characteristics between junctionless (JL) and conventional silicon-on-insulator (SOI) fin-type field-effect transistors (FinFETs) at elevated temperatures (300–500 K). A numerical device simulator is used for this study. Analog performance parameters of a JL FinFET are found to be less sensitive to variation in temperature as compared with its IM counterpart. Linearity is also found to be better for JL devices than IM devices for the entire temperature range. Moreover, harmonic distortion is found to be less for JL devices than IM devices.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. J.-P. Colinge, C.-W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, P. Razavi, B. O’Neill, A. Blake, M. White, A.-M. Kelleher, B. McCarthy, and R. Murphy, Nat. Nanotechnol. 5, 225 (2010).

    Article  CAS  Google Scholar 

  2. A. Nazarov, J.-P. Colinge, F. Balestra, J.-P. Raskin, F. Gamiz, and V.S. Lysenko, Semiconductor-on-Insulator Materials for Nanoelectronics Applications, Engineering Materials (New York: Springer, 2011), pp. 187–200.

    Google Scholar 

  3. Y. Taur, C.H. Wann, and D.J. Frank, in IEDM Tech. Dig. (1998), pp. 789–792.

  4. R. Rios, A. Cappellani, M. Armstrong, A. Budrevich, H. Gomez, R. Pai, N. Rahhal-orabi, and K. Kuhn, IEEE Electron. Dev. Lett. 32, 1170 (2009).

    Article  Google Scholar 

  5. J.-P. Colinge, C.-W. Lee, A. Afzalian, and N.D. Akhavan, in IEEE Int. SOI Conf. Proceeding (2009), pp. 1–2.

  6. A. Kranti, R. Yan, C.-W. Lee, I. Ferain, R. Yu, N.D. Akhavan, P. Razavi, and J.-P. Colinge, Solid State Electron. 65/66, 33 (2011).

    Article  Google Scholar 

  7. J.-P. Colinge, C.-W. Lee, I. Ferain, N.D. Akhavan, R. Yan, P. Razavi, R. Yu, A.N. Nazarov, and R.T. Doria, Appl. Phys. Lett. 96, 073510 (2010).

    Article  Google Scholar 

  8. C.-W. Lee, A.N. Nazarov, I. Ferain, N.D. Akhavan, R. Yan, P. Razavi, R.T. Doria, and J.-P. Colinge, Appl. Phys. Lett. 96, 102106 (2010).

    Article  Google Scholar 

  9. C.-H. Park, M.-D. Ko, K.-H. Kim, R.-H. Baek, C.-W. Sohn, C.K. Baek, S. Park, M.J. Dean, Y.-H. Jeong, and J.-S. Lee, Solid State Electron. 73, 7 (2012).

    Article  CAS  Google Scholar 

  10. S. Guin, M. Sil, and A. Mallik, IEEE Trans. Electron. Dev. 64, 953 (2017).

    Article  Google Scholar 

  11. R.T. Doria, M.A. Pavanello, R.D. Trevisoli, M. De Souza, C.-W. Lee, I. Ferain, N.D. Akhavan, R. Yan, P. Razavi, R. Yu, A. Kranti, and J.-P. Colinge, IEEE Trans. Electron. Dev. 58, 2511 (2011).

    Article  CAS  Google Scholar 

  12. R.K. Baruah and R.P. Paily, IEEE Trans. Electron. Dev. 61, 123 (2014).

    Article  CAS  Google Scholar 

  13. J.A. McDonald and H.T.E. Report, III Vs Rev. 9, 63 (1996).

    Google Scholar 

  14. A.A. Osman and M.A Osman, in HITEC 1998, USA (1998), pp. 301–304.

  15. A.P.B. Ziliotto, and M. Bellodi, in IV Seminatec, São Paulo (2008).

  16. A.P.B. Ziliotto and M. Bellodi, ECS Trans. 41, 163 (2011).

    Article  CAS  Google Scholar 

  17. International Technology Roadmap for Semiconductors. San Jose, CA, USA: Semiconductor Association (2013).

  18. ATLAS User’s Manual, A Device Simulation Software Package (Santa Clara: SILVACO Int., 2015).

    Google Scholar 

  19. A. Cerdeira, M. Estrada, R. Quintero, D. Flandre, A. Ortiz-Conde, and F.J. Garćia Sánchez, Solid State Electron. 46, 103 (2002).

    Article  CAS  Google Scholar 

  20. S.M. Sze, Physics of Semiconductor Devices, 2nd ed. (New York: Wiley, 1981).

    Google Scholar 

  21. P. Ghosh, S. Haldar, R.S. Gupta, and M. Gupta, IEEE Trans. Electron. Dev. 59, 3263 (2012).

    Article  Google Scholar 

  22. R.T. Doria, A. Cerdeira, J.-P. Raskin, D. Flandre, and M.A. Pavanello, Microelectron. J. 39, 1663 (2008).

    Article  Google Scholar 

  23. W. Sansen, IEEE Trans. Circuits Syst. 46, 315 (1999).

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Emona Datta.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Datta, E., Chattopadhyay, A. & Mallik, A. Relative Study of Analog Performance, Linearity, and Harmonic Distortion Between Junctionless and Conventional SOI FinFETs at Elevated Temperatures. J. Electron. Mater. 49, 3309–3316 (2020). https://doi.org/10.1007/s11664-020-08024-x

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11664-020-08024-x

Keywords

Navigation