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Real-time performance evaluation of line topology switched Ethernet

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Abstract

Recently, switched Ethernet has become an active area of research because of its wide uses in industry. However, its uses have various real-time constraints on data communications. This paper analyzes the performance of the line topology switched Ethernet as a data acquisition network. Network calculus theory, which has been successfully applied to assess the real-time performance of packet-switched networks, is used to analyze the networks. To properly describe the activity of switches, a novel approach of modeling data flows into or out of switches is addressed. Based on our model, a concisely analytical expression of the maximal end-to-end delay in line topology switched Ethernet is derived. Finally, the relative simulation results are demonstrated. These results agree well with the analytical results, and thus they validate the data flow modeling techniques.

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Correspondence to Fan Cen.

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Fan Cen received the B. Sc. degree in electronic engineering from the Tsinghua University, PRC, in 2004. He is currently a Ph.D. candidate in the Institute of Acoustics, Chinese Academy of Sciences (IACAS). He received the Outstanding Student Award from the Graduate School of Chinese Academy of Sciences in 2007.

His research interests include embedded system design and interconnection networks.

Tao Xing graduated from Tsinghua University, PRC, in 2001. He received the Ph.D. degree from the Institute of Acoustics, Chinese Academy of Sciences (IACAS), in 2006. He is currently an associate professor at the Sonar Engineering Laboratory, IACAS.

His research interests include circuit and system, high performance signal processing, and data acquisition.

Ke-Tong Wu received the B. Sc. degree in electronic science & engineering from Nanjing University, PRC, in 2003. He is currently a Ph. D. candidate at IACAS.

His research interests include statistical and array signal processing, machine learning and their applications.

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Cen, F., Xing, T. & Wu, KT. Real-time performance evaluation of line topology switched Ethernet. Int. J. Autom. Comput. 5, 376–380 (2008). https://doi.org/10.1007/s11633-008-0376-5

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  • DOI: https://doi.org/10.1007/s11633-008-0376-5

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