Abstract
This paper describes a new fault localization method that is based on the analysis of power supply transient signals. Impulse response functions derived from the power grid are used to de-construct the measured power port transient signals into a set of gate level transients generated by the logic gates as signals propagate along paths in the circuit. By comparing these gate transients with those obtained from a defect-free chip or simulation model, it is possible to identify anomalies produced by defects and to locate them to specific path segments in the layout. Impulse response functions are used to significantly reduce both the attenuation effects of the power grid on the gate-generated transients and the chip-to-chip impedance variations in the power grid and test environment. Non-linear calibration techniques are proposed to reduce the chip-to-chip variations in path delays introduced by process variations. The procedure is demonstrated using simulation experiments to locate the position of defects to one or a small group of gates.
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Notes
Power grid characterization is previously discussed in [17] and briefly discussed here for ease of reference.
Current transients are analyzed in this paper, but the same model and procedure holds for voltage transient analysis.
Only one RC model of the power grid needs to be extracted from the layout, e.g., using the nominal values of the process. Process variations are handled by a separate procedure.
The scan chain is not shown in Fig. 3b. It connects the calibration circuits used in each approach together to implement a shift register.
This process is repeated for other gates along the path.
The normalization process accounts for current step variations that occur in the CCs of the CUT due to process variations.
Fan-out was added to improve the accuracy of the modeling of an actual circuit path.
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Rad, R.M., Plusquellic, J. A Novel Fault Localization Technique Based on Deconvolution and Calibration of Power Pad Transients Signals. J Electron Test 25, 169–185 (2009). https://doi.org/10.1007/s10836-008-5092-0
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DOI: https://doi.org/10.1007/s10836-008-5092-0