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Parametric fault detection of analog circuits based on Bhattacharyya measure

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Abstract

This paper presents a fault detection algorithm to detect parametric fault in linear and weakly non-linear analog circuits by Bhattacharyya measure, a statistical metric. Linear feedback shift register (LFSR) generated pseudo-random bit sequences are fed to digital-to-analog converter (DAC) to obtain random analog input stimuli for the circuit under test (CUT). Bhattacharyya coefficient is measured from the probability density function (PDF) of the output. The non-Gaussian auto-regressive model is used to estimate the PDF. Component tolerance is mapped into statistical space by Monte Carlo simulation. The proposed methodology is validated through three benchmark circuits: continuous-time low pass state variable filter circuit, fourth order low pass Chebyshev filter circuit and cascade amplifier. All the circuits are simulated with CADENCE Virtuoso using UMC-180nm technology. Defect screening is also measured with linear regression analysis. Detectability of the proposed method for parametric fault is reasonably large in comparison to functional test method.

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Acknowledgements

This work has been partially supported by SMDP-C2SD project DeitY, MCIT, India. S. Srimani thankfully acknowledges DeitY, India for his Visvesvaraya fellowship during his Ph.D. program.

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Authors and Affiliations

  1. School of VLSI Technology, Indian Institute of Engineering Science and Technology, Howrah, West Bengal, 711103, India

    Supriyo Srimani, Manas Kumar Parai, Kasturi Ghosh & Hafizur Rahaman

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  1. Supriyo Srimani
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  2. Manas Kumar Parai
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  3. Kasturi Ghosh
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  4. Hafizur Rahaman
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Correspondence to Kasturi Ghosh.

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Srimani, S., Parai, M.K., Ghosh, K. et al. Parametric fault detection of analog circuits based on Bhattacharyya measure. Analog Integr Circ Sig Process 93, 477–488 (2017). https://doi.org/10.1007/s10470-017-1052-x

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  • DOI: https://doi.org/10.1007/s10470-017-1052-x

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