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Fully integrated, low drop-out linear voltage regulator in 180 nm CMOS

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Abstract

This paper presents a capacitor-free low dropout (LDO) linear regulator based on a dual loop topology. The regulator utilizes two feedback loops to satisfy the challenges of hearing aid devices, which include fast transient performance and small voltage spikes under rapid load-current changes. The proposed design works without the need of a decoupling capacitor connected at the output and operates with a 0–100 pF capacitive load. The design has been taped out in a \(0.18\,\upmu \hbox {m}\) CMOS process. The proposed regulator has a low component count, area of \(0.012\, \hbox {mm}^2\) and is suitable for system-on-chip integration. It regulates the output voltage at 0.9 V from a 1.0–1.4 V supply. The measured results for a current step load from 250 to 500 \(\upmu \hbox {A}\) with a rise and fall time of \(1.5\,\upmu \hbox {s}\) are an overshoot of 26 mV and undershoot of 26 mV with a settling time of \(3.5\,\upmu \hbox {s}\) when \({C_L}\) between 0 and 100 pF. The proposed LDO regulator consumes a quiescent current of only \(10.5\,\upmu \hbox {A}\). The design is suitable for application with a current step edge time of 1 ns while maintaining \(\Delta V_{out}\) of 64 mV.

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Notes

  1. Edge time of \(1.5\,\upmu \hbox {s}\) was used for measurements and compared to simulations due to measurement limitations.

References

  1. Leung, K. N., & Mok, P. K. (2003). A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation. IEEE Journal of Solid-State Circuits, 38(10), 1691–1702.

    Article  Google Scholar 

  2. Milliken, R. J., Silva-Martinez, J., & Sanchez-Sinencio, E. (2007). Full on-chip CMOS low-dropout voltage regulator. IEEE Transactions on Circuits and Systems I: Regular Papers, 54(9), 1879–1890.

    Article  Google Scholar 

  3. Or, P. Y., & Leung, K. N. (2010). An output-capacitorless low-dropout regulator with direct voltage-spike detection. IEEE Journal of Solid-State Circuits, 45(2), 458–466.

    Article  Google Scholar 

  4. Guo, J., & Leung, K. N. (2010). A \(6-{\upmu }\) W chip-area-efficient output-capacitorless LDO in 90-nm CMOS technology. IEEE Journal of Solid-State Circuits, 45(9), 1896–1905.

    Article  Google Scholar 

  5. Ho, E. N., & Mok, P. K. (2010). A capacitor-less CMOS active feedback low-dropout regulator with slew-rate enhancement for portable on-chip application. IEEE Transactions on Circuits and Systems II: Express Briefs, 57(2), 80–84.

    Article  Google Scholar 

  6. Hong, S. W., & Cho, G. H. (2016). High-gain wide-bandwidth capacitor-less low-dropout regulator (LDO) for mobile applications utilizing frequency response of multiple feedback loops. IEEE Transactions on Circuits and Systems I: Regular Papers, 63(1), 46–57.

    Article  Google Scholar 

  7. Deleuran, A. N., Lindbjerg, N., Pedersen, M. K., Muntal, P. L., & Jørgensen, I. H. (2015). A capacitor-free, fast transient response linear voltage regulator in a 180nm CMOS. In Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC), 2015 (pp. 1–4). IEEE.

  8. Kim, Y. I., & Lee, S. S. (2013). A capacitorless LDO regulator with fast feedback technique and low-quiescent current error amplifier. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(6), 326–330.

    Article  Google Scholar 

  9. Maity, A., & Patra, A. (2016). Tradeoffs aware design procedure for an adaptively biased capacitorless low dropout regulator using nested Miller compensation. IEEE Transactions on Power Electronics, 31(1), 369–380.

    Article  Google Scholar 

  10. Yosef-Hay, Y., Muntal, P. L., Larsen, D. Ø., & Jørgensen, I. H. (2016). Capacitor-free, low drop-out linear regulator in a 180 nm CMOS for hearing aids. In Nordic Circuits and Systems Conference (NORCAS), 2016 IEEE (pp. 1–5). IEEE.

  11. Ming, X., Li, Q., Zhou, Z. K., & Zhang, B. (2012). An ultrafast adaptively biased capacitorless LDO with dynamic charging control. IEEE Transactions on Circuits and Systems II: Express Briefs, 59(1), 40–44.

    Article  Google Scholar 

  12. Chen, C. M., & Hung, C. C. (2013). Enhanced active feedback technique with dynamic compensation for low-dropout voltage regulator. Analog Integrated Circuits and Signal Processing, 75(1), 97–108.

    Article  Google Scholar 

  13. Lam, Y. H., & Ki, W. H. (2008). A 0.9 V 0.35 m adaptively biased CMOS LDO regulator with fast transient response. In Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International (pp. 442–626). IEEE.

  14. Banerjee, J., & Nandurkar, T. S. (2005). U.S. Patent No. 6,933,772. Washington, DC: U.S. Patent and Trademark Office.

  15. Jackum, T., Maderbacher, G., Pribyl, W., & Riederer, R. (2011). Fast transient response capacitor-free linear voltage regulator in 65nm CMOS. In IEEE International Symposium on Circuits and Systems (ISCAS), 2011 (pp. 905–908). IEEE.

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Authors and Affiliations

  1. Department of Electrical Engineering, Electronics Group, Technical University of Denmark (DTU), Building 325, Kgs., 2800, Lyngby, Denmark

    Yoni Yosef-Hay, Dennis Øland Larsen, Pere Llimós Muntal & Ivan H. H. Jørgensen

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  1. Yoni Yosef-Hay
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  2. Dennis Øland Larsen
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  3. Pere Llimós Muntal
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  4. Ivan H. H. Jørgensen
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Correspondence to Yoni Yosef-Hay.

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Yosef-Hay, Y., Larsen, D.Ø., Muntal, P.L. et al. Fully integrated, low drop-out linear voltage regulator in 180 nm CMOS. Analog Integr Circ Sig Process 92, 427–436 (2017). https://doi.org/10.1007/s10470-017-1012-5

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  • DOI: https://doi.org/10.1007/s10470-017-1012-5

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