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Construction of a reconfigurable dynamic logic cell

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Abstract

We report the first experimental realization of all the fundamental logic gates, flexibly, using a chaotic circuit. In our scheme a simple threshold mechanism allows the chaotic unit to switch easily between behaviours emulating the different gates. We also demonstrate the combination of gates through a half-adder implementation.

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Authors and Affiliations

  1. Department of Physics, Anna University, 600 025, Chennai, India

    K. Murali

  2. The Institute of Mathematical Sciences, Taramani, 600 113, Chennai, India

    Sudeshna Sinha

  3. Department of Biomedical Engineering, University of Florida, 326611-6131, Gainesville, FL, USA

    William L. Ditto

Authors
  1. K. Murali
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  2. Sudeshna Sinha
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  3. William L. Ditto
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Murali, K., Sinha, S. & Ditto, W.L. Construction of a reconfigurable dynamic logic cell. Pramana - J Phys 64, 433–441 (2005). https://doi.org/10.1007/BF02704569

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  • DOI: https://doi.org/10.1007/BF02704569

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