Abstract
This paper introduces a variability-aware methodology for the design of LC-VCOs in Nano-CMOS technologies. The complexity of the design as well as the necessity for having an environment offering the possibility for exploring design trade-offs has led to the development of design methodologies based multi-objective optimization procedures yielding the generation of Pareto-optimal surfaces. The efficiency of the process is granted by using analytical models for both passive and active devices. Although physics-based analytical expressions have been proposed for the evaluation of the lumped elements, the variability of the process parameters is usually ignored due to the difficulty to formalize it into an optimization performance index. The usually adopted methodology of considering only optimum solutions for the Pareto surface, may lead to pruning quasi-optimal solutions that may prove to be better, should their sensitivity to process parameter variation be accounted for. In this work we propose starting by generating an extended Pareto surface where both optimum and quasi-optimum solutions are considered. Finally information on the sensitivity to process parameter variations, is used for electing the best design solution.
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Maricau, E., Gielen, G.: Computer-Aided Analog Circuit Design for Reliability in Nanometer CMOS. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1, 50–58 (2011)
Ghai, D., Mohanty, S., Kougianos, E.: Design of Parasitic and Process-Variation Aware Nano-CMOS RF Circuits: A VCO Case Study. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17, 1339–1342 (2009)
Ghai, D., Mohanty, S., Kougianos, E.: Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design. In: 9th International Symposium on Quality Electronic Design (ISQED), pp. 330–333 (2008)
Garitselov, O., Mohanty, S., Kougianos, E.: Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling. In: 12th International Symposium on Quality Electronic Design (ISQED), pp. 1–6 (2011)
Murakami, R., Hara, S., Okada, K., Matsuzawa, A.: Design optimization of voltage controlled oscillators in consideration of parasitic capacitance. In: 52nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2009, pp. 1010–1013 (2009)
Fard, A.: Analysis and Design of Low-Phase-Noise Integrated Voltage-Controlled Oscillators for Wide-Band RF Front-Ends. PhD Thesis, Mälardalen University, Department of Computer Science and Electronics, Institutionen för Datavetenskap och Elektronik, Sweden (2006)
Shah, D., Siva, K., Girishankar, G., Nagaaj, N.S.: Optimizing Interconnect for Performance in Standard Cell Library. In: Proc. IEEE Asian Pacific Conference on Circuits and Systems (2006)
Ma, D., Shi, G., Lee, A.: A design platform for analog device size sensitivity analysis and visualization. In: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 48–51 (2010)
Shi, G., Meng, X.: Variational analog integrated circuit design via symbolic sensitivity analysis. In: IEEE International Symposium on Circuits and System (ISCAS), pp. 3002–3005 (2009)
Gutierrez, I., Meléndez, J., Hernández, E.: Design and Characterization of Integrated Varactors for RF Applications. John Wiley & Sons (2007)
Maricau, E., Gielen, G.: Computer-Aided Analog Circuit Design for Reliability in Nanometer CMOS. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1, 5–58 (2011)
Nieuwoudt, A., Massoud, Y.: Robust automated synthesis methodology for integrated spiral inductors with variability. In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 502–507 (2005)
Park, J., Choi, K., Allstot, D.: Parasitic-aware RF circuit design and optimization. IEEE Transactions on Circuits and Systems I: Regular Papers 51, 1953–1966 (2004)
Murakami, R., Hara, S., Okada, K., Matsuzawa, A.: Design optimization of voltage controlled oscillators in consideration of parasitic capacitance. In: 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1010–1013 (2009)
Ham, D.: Trade-Offs in Analog Circuit Design. In: Design of Integrated LC VCOs, pp. 517–549. Springer, US (2002)
Fiorelli, R., Silveira, F., Peralas, E.: Phase noise - consumption trade-off in low power RF-LC-VCO design in micro and nanometric technologies. In: 22nd Annual Symposium on Integrated Circuits and System Design (SBCCI), pp. 1–6 (2009)
Ben Issa, D., Akacha, S., Kachouri, A., Samet, M.: Graphical optimization of 4GHz CMOS LC-VCO. In: 4th International Conference on Design Technology of Integrated Systems in Nanoscal Era (DTIS), pp. 33–37 (2009)
Pereira, P., Helena Fino, M., Coito, F., Ventim-Neves, M.: RF integrated inductor modeling and its application to optimization-based design. J. Analog Integrated Circuits and Signal Processing (2011)
Pereira, P., Fino, M.H., Coito, F., Ventim-Neves, M.: GADISI – Genetic Algorithms Applied to the Automatic Design of Integrated Spiral Inductors. In: Camarinha-Matos, L.M., Pereira, P., Ribeiro, L. (eds.) DoCEIS 2010. IFIP AICT, vol. 314, pp. 515–522. Springer, Heidelberg (2010)
Ma, D., Shi, G., Lee, A.: A design platform for analog device size sensitivity analysis and visualization. In: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 48–51 (2010)
Li, X., Xu, H., Shi, G., Tai, A.: Hierarchical symbolic sensitivity computation with applications to large amplifier circuit design. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2733–2736 (2011)
Shi, G., Meng, X.: Variational analog integrated circuit design via symbolic sensitivity analysis. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3002–3005 (2009)
Pereira, P., Fino, H., Coito, F., Ventim-Neves, M.: ADISI- An efficient tool for the automatic design of integrated spiral inductors. In: 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 799–802 (2009)
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Pereira, P., Fino, H., Coito, F.V., Ventim-Neves, M. (2012). Optimization-Based Design of Nano-CMOS LC-VCOs. In: Camarinha-Matos, L.M., Shahamatnia, E., Nunes, G. (eds) Technological Innovation for Value Creation. DoCEIS 2012. IFIP Advances in Information and Communication Technology, vol 372. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-28255-3_50
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DOI: https://doi.org/10.1007/978-3-642-28255-3_50
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