Abstract
A digit-serial, multiplier-accumulator based cryptographic co-processor architecture is proposed, similar to fix-point DSP’s with enhancements, supporting long modular arithmetic and general computations. Several new “column-sum” variants of popular quadratic time modular multiplication algorithms are presented (Montgomery and interleaved division-reduction with or without Quisquater scaling), which are faster than the traditional implementations, need no or very little memory beyond the operand storage and perform squaring about twice faster than general multiplications or modular reductions. They provide similar advantages in software for general purpose CPU’s.
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Hars, L.: manuscript (2003)
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Hars, L. (2004). Long Modular Multiplication for Cryptographic Applications. In: Joye, M., Quisquater, JJ. (eds) Cryptographic Hardware and Embedded Systems - CHES 2004. CHES 2004. Lecture Notes in Computer Science, vol 3156. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-28632-5_4
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DOI: https://doi.org/10.1007/978-3-540-28632-5_4
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