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Study of Analog/Rf and Stability Investigation of Surrounded Gate Junctionless Graded Channel MOSFET(SJLGC MOSFET)

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Abstract

This paper explores the potential advantage of surrounded gate junctionless graded channel (SJLGC) MOSFET in the view of its Analog, RF performances using ATLAS TCAD device simulator. The impact of graded channel in the lateral direction on the potential, electric field, and velocity of carriers, energy band along the channel is investigated systematically. The present work mainly emphasises on the superior performance of SJLGC MOSFET by showing higher drain current (ID), transconductance (gm) ,cut off frequency (fT), maximum frequency of oscillation (fmax), critical frequency (fK) .The drain current is improved by 10.03 % in SJLGC MOSFET due to the impact of grading the channel. There is an improvement in fT, fmax, fK by 45 %, 29 % and 18 % respectively in SJLGC MOSFET showing better RF Performance. The dominance of the SJLGC MOSFET over SJL MOSFET is further elucidated by showing 74 % improvement in intrinsic voltage gain (gm/gds) indicating its better applications in sub threshold region. But the transconductance generation factor of SJLGC MOSFET is less than SJL MOSFET in the subthreshold region. The intrinsic gate delay (ζD) of SJLGC MOSFET is less in comparison to SJL MOSFET due to the impact of lower gate to gate capacitance (CGG) suggesting better digital switching applications. The simulation results reveal that SJLGC MOSFET can be a competitive contender for the coming generation of RF circuits covering a broad range of operating frequencies in RF spectrum.

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The authors confirm that the data supporting the findings of this study are available within the article, its supplementary materials or below mentioned references.

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Authors and Affiliations

  1. Gandhi Institute of Technological Advancement (GITA), Bhubaneswar, Odisha, 752054, India

    Sarita Misra

  2. Silicon Institute of Technology, 751024, Bhubaneswar, Odisha, India

    Sudhansu Mohan Biswal, Biswajit Baral, Sanjit Kumar Swain & Sudhansu Kumar Pati

Authors
  1. Sarita Misra
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  2. Sudhansu Mohan Biswal
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  3. Biswajit Baral
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  4. Sanjit Kumar Swain
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  5. Sudhansu Kumar Pati
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Contributions

Sarita Misra,Sudhansu Mohan Biswal - Conceptualization, methodology, simulation and investigation,

Biswajit Baral,Sanjit Kumar Swain - Writing original draft preparation, reviewing and editing, Sudhansu.

Kumar Pati -Validation and overall correction.

Corresponding author

Correspondence to Sudhansu Mohan Biswal.

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Highlights

• The proposed device exhibits the potential advantage of having surrounded gate, junctionless, graded channel architecture.

• Comparison of center potential, electric field, average velocity, energy band diagram of surrounded gate junctionless graded channel (SJLGC) MOSFET (SJLGC) with surrounded gate junctionless (SJL) MOSFET.

• Systematic Comparison of Analog/RF performances of SJLGC MOSFET and SJL MOSFET.

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Misra, S., Biswal, S.M., Baral, B. et al. Study of Analog/Rf and Stability Investigation of Surrounded Gate Junctionless Graded Channel MOSFET(SJLGC MOSFET). Silicon 14, 6391–6402 (2022). https://doi.org/10.1007/s12633-021-01397-6

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  • DOI: https://doi.org/10.1007/s12633-021-01397-6

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