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Design and Implementation of a SoPC System for Speech Recognition

  • Tran Van Hoang
  • Nguyen Ly Thien Truong
  • Hoang Trang
  • Xuan-Tu Tran
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 240)

Abstract

This paper presents the design of a System on Programmable Chip (SoPC) based on Field Programmable Gate Array (FPGA) for speech recognition in which Mel-Frequency Cepstral Coefficients (MFCC) for speech feature extraction and Vector Quantization (VQ) for recognition are used. The execution speed of the blocks in the speech recognition system is surveyed by calculating the number of clock cycles while executing each block.

Keywords

Speech recognition MFCC VQ SoPC FPGA Nios 

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Copyright information

© Springer Science+Business Media Dordrecht(Outside the USA) 2013

Authors and Affiliations

  • Tran Van Hoang
    • 1
  • Nguyen Ly Thien Truong
    • 1
  • Hoang Trang
    • 1
  • Xuan-Tu Tran
    • 2
  1. 1.University of TechnologyVietnam National UniversityHoChiMinh CityVietnam
  2. 2.VNU University of Engineering and TechnologyHanoiVietnam

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