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Application of Bonded Wafers to the Fabrication of Electronic Devices

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Wafer Bonding

Part of the book series: Springer Series in MATERIALS SCIENCE ((SSMATERIALS,volume 75))

Abstract

This chapter reviews the application of wafer bonding to the fabrication of electronic devices, with the main focus on silicon-on-insulator (SOI) substrates prepared by fusion bonding of silicon-related materials. Since several comprehensive reviews have recently been published on the use of thin (thickness < 1 µm) SOI material for low-power, low-voltage, high-speed VLSI CMOS, such as for DRAMs [22, 64, 140], the chapter will concentrate on relatively thick-film bonded SOI, in the range of 1–2 µm and above. Initially, the application of standard SOI will be described, with particular emphasis on the fabrication of trench-isolated structures and the performance benefits gained through the utilisation of this technology for both low- and high-voltage products. Subsequent sections will cover more novel processing, such as the incorporation of silicide buried layers and the combination of integrated microelectronics with sensing or actuating elements fabricated on the same substrate. Finally, applications related to direct silicon-onsilicon bonding, where the buried oxide (BOX) is eliminated, will be described.

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Nevin, A.W. (2004). Application of Bonded Wafers to the Fabrication of Electronic Devices. In: Alexe, M., Gösele, U. (eds) Wafer Bonding. Springer Series in MATERIALS SCIENCE, vol 75. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-10827-7_6

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