Skip to main content

Pseudo-Exhaustive Testing Based on March Tests

  • Chapter
  • First Online:
Multi-run Memory Tests for Pattern Sensitive Faults
  • 417 Accesses

Abstract

The chapter deeply analyzes the pseudo-exhaustive tests based on march tests. The main advantage of pseudo-exhaustive testing is its high fault coverage and lower complexity compared with exhaustive testing. The investigation is based on the idea of orbits defined as sets of patterns received as a result of the run of march tests with one read and one write operation. The problem of pseudo-exhaustive tests based on multi-run memory testing with background changing and/or address order variation is regarded as the coupon-collector’s problem which is a classical problem in combinatorial probability. Finally, the complexity of pseudo-exhaustive tests formed on the reordering of address sequences and tests based on background changing is compared.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 54.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Flajolet, P., Gardy, D., and Thimonier, L. Birthday paradox, coupon collectors, caching algorithms and self-organizing search. Discrete Applied Mathematics 39, 3 (Nov. 1992), 207–229.

    Article  MathSciNet  Google Scholar 

  2. Karpovsky, M. G., Goor, A. J. v. d., and Yarmolik, V. N. Pseudo-exhaustive word-oriented DRAM testing. In Proceedings of the European conference on Design and Test (Washington, DC, USA, 1995), EDTC’95, IEEE Computer Society, p. 126.

    Google Scholar 

  3. Karpovsky, M. G., and Yarmolik, V. N. Transparent memory testing for pattern-sensitive faults. In Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years (1994), ITC’94, IEEE Computer Society, pp. 860–869.

    Google Scholar 

  4. Levitin, L. B., and Karpovsky, M. G. Exhaustive testing of almost all devices with outputs depending on limited number of inputs. Open Systems & Information Dynamics 2, 3 (Oct. 1994), 303–318.

    Article  Google Scholar 

  5. Mrozek, I., and Yarmolik, V. Two-run RAM march testing with address decimation. Journal of Circuits, Systems, and Computers 26, 2 (2017), 1750031.

    Article  Google Scholar 

  6. Mrozek, I., and Yarmolik, V. N. Antirandom test vectors for BIST in hardware/software systems. Fundamenta Informaticae 119, 2 (2012), 163–185.

    Google Scholar 

  7. Niggemeyer, D., Otterstedt, J., and Redeker, M. Detection of non classical memory faults using degrees of freedom in march testing. In Proceedings of the 11th IEEE International Workshop on Memory Technology, Design and Testing (Potsdam, 1999), pp. 111–119.

    Google Scholar 

  8. Pandey, P., and Kapse, V. A BIST circuit for fault detection using pseudo exhaustive two pattern generator. International Journal of Engineering Research & Technology 1, 5 (July 2012), 380–385.

    Google Scholar 

  9. Sokol, B., Mrozek, I., and Yarmolik, V. N. Impact of the address changing on the detection of pattern sensitive faults. Information Processing and Security Systems (2005), 217–255.

    Google Scholar 

  10. Sokol, B., and Yarmolik, V. N. Wpływ zmian porz ądku adresów i zawartości na efektywność testów pamieci. In Materiały konferencyjne V Krajowej Konferencji Naukowej ,,Reprogramowalne Układy Cyfrowe” (Szczecin, 13–14 maja 2004), RUC’04, pp. 163–171.

    Google Scholar 

  11. van de Goor, A. J. Testing Semiconductor Memories: Theory and Practice. John Wiley & Sons, Chichester, England, 1991.

    Google Scholar 

  12. Voyiatzis, I., Gizopoulos, D., and Paschalis, A. M. Recursive pseudo-exhaustive two-pattern generation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18, 1 (2010), 142–152.

    Article  Google Scholar 

  13. Yarmolik, S. Address sequences and backgrounds with different hamming distances for multiple run march tests. International Journal of Applied Mathematics and Computer Science 18, 3 (2008), 329–339.

    Article  Google Scholar 

  14. Yarmolik, S. V., and Mrozek, I. Multi background memory testing. In Proceedings of the 14 th International Conference Mixed design of integrated circuits and systems (Ciechocinek, Poland, June 2007), MIXDES’07, IEEE Computer Society, pp. 511–516.

    Google Scholar 

  15. Yarmolik, V., Mrozek, I., and Levancevich, W. Psevdoyscerpyvajusee testirovaniye OZU (in Russian). Informatika, 5 (2017), 58–69.

    Google Scholar 

  16. Yarmolik, V., and Yarmolik, S. Address sequences for multiple run march tests. Automatic Control and Computer Sciences, 5 (2006), 59–68.

    MATH  Google Scholar 

  17. Yarmolik, V., and Yarmolik, S. The repeated nondestructive march tests with variable address sequences. Automation and Remote Control 68, 4 (2007), 688–698.

    Article  MathSciNet  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2019 Springer International Publishing AG, part of Springer Nature

About this chapter

Check for updates. Verify currency and authenticity via CrossMark

Cite this chapter

Mrozek, I. (2019). Pseudo-Exhaustive Testing Based on March Tests. In: Multi-run Memory Tests for Pattern Sensitive Faults. Springer, Cham. https://doi.org/10.1007/978-3-319-91204-2_8

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-91204-2_8

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-91203-5

  • Online ISBN: 978-3-319-91204-2

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics