Abstract
An lateral-diffused MOS (LDMOS) is often used to as the ESD device in a high-voltage circuit for its low on-resistance benefit. But, it has several serious disadvantages, including the Vh value is not high enough and the device in a multi-finger structure can’t completely turn on which resulting in the ESD capability per unit length is very low. So, the non-uniform turned-on phenomenon is seriously impacted the robustness of ESD reliability. Therefore, this paper is based on the drain FOD structure of an nLDMOS, and which will change the OD structure for contacts located in the drain-side. The OD structure will renew as some dotted-ODs layout. Experimental results show that the dotted-OD layout has a higher ESD capability than the FOD structure, and the layout type of dotted-OD will affect the ESD capability of an HV component, where a uniformly distributed type of dotted-OD will have a highest It2 value, the It2 value is increased about 12 % as compared with the traditional LDMOS. The Vh value will increase with the contacts number increasing within the dotted-OD, therefore, this structure can also effectively improve the latch-up (LU) immunity.
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Acknowledgments
In this work, authors would like to thank the National Chip Implementation Center in Taiwan for providing the process information and fabrication platform.
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Chen, SL., Lee, MH., Lin, CJ., Lai, YS., Chang, S., Huang, YT. (2014). ESD Performance Influence of a 60-V Lateral-Diffused-MOST by the FOD Based (and Dotted-OD) Drain. In: Juang, J., Chen, CY., Yang, CF. (eds) Proceedings of the 2nd International Conference on Intelligent Technologies and Engineering Systems (ICITES2013). Lecture Notes in Electrical Engineering, vol 293. Springer, Cham. https://doi.org/10.1007/978-3-319-04573-3_108
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DOI: https://doi.org/10.1007/978-3-319-04573-3_108
Publisher Name: Springer, Cham
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