Interface Properties and Device Reliability of High Quality PECVD Oxide for MOS Applications
Recently PECVD oxide has been attracting much attention as gate dielectric material for silicon FET device applications because the high temperature oxidation process and the dopant segregation occurrence can be eliminated by depositing oxide directly on the device substrates in a low temperature environment [1–5]. In addition, this oxide can be the gate dielectric for Si-Ge alloy as well as III-V semiconductors such as GaAs and InP where high quality thermal oxide is not available. It has been reported that these deposited oxides can have similar defect densities, breakdown fields, and trapping property in the oxide as thermally grown oxides [1–4]. However, the reliability of the PECVD oxide as the gate dielectric for the deep submicron silicon gate FETs has not been reported. In this paper, we investigate the hot carrier induced degradation on the devices with PECVD and thermally grown gate oxides. To facilitate the comparison of hot-carrier reliability, CMOS devices and buried junction hot electron injector structure with both PECVD and thermally grown 7 nm gate oxides are fabricated using a 0.25 μm gate CMOS technology [6,7].
KeywordsGate Oxide Interface Trap Threshold Voltage Shift CMOS Device IEDM Tech
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