FA Future Requirements

Abstract

Failure analysis, like any facet of the semiconductor industry, is challenged to continuously improve to remain viable. Consider a microprocessor in the year 2006, operating at only 3 GHz, a full 500 mHz below its specified clock frequency of 3.5 gHz. Somewhere in its 200,000,000 transistors, each with a gate dielectric 1.5–2 nm thick (about 3 silicon atom spacings), buried in 7 levels and 5000 meters of metal wiring and 4000 area-array solder balls, is a single defect, perhaps an area of chemical contamination in the air-filled dielectric. It causes a slight increase in capacitance between two conductors and a circuit delay of just 2–3 ps. The contamination is invisible in an optical or electron microscope and below the detection limits of current scanning probe techniques. It is easily removed during deprocessing of the dielectric film. The IC is flip-chip mounted directly to a printed circuit board and must be exercised in-place to recreate the failure. The use of built-in diagnosability is limited and the design is highly synthesized, restricting understanding of circuit operation.