Abstract
Over the last two decades, the relative importance of on-chip interconnect to integrated circuits has increased dramatically with the interconnect now contributing a significant portion of the overall delay. With this increasing importance of on-chip interconnect, more accurate interconnect models are required to correctly design functioning high speed integrated circuits. To date, the IC industry has predominantly modeled the interconnect as one of three models: a short-circuit for short, low resistance, low capacitance wires with high output impedance drivers, a lumped capacitance for those wires with low total resistance relative to the driver output resistance with non-negligible capacitance, and an RC distributed impedance for longer, highly resistive wires.
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© 2001 Springer Science+Business Media New York
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Ismail, Y.I., Friedman, E.G. (2001). Conclusions. In: On-Chip Inductance in High Speed Integrated Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-1685-9_14
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DOI: https://doi.org/10.1007/978-1-4615-1685-9_14
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-5677-6
Online ISBN: 978-1-4615-1685-9
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