Advertisement

Materials and Interfaces in Microsystems

  • Tomi Laurila
  • Vesa Vuorinen
  • Toni T. Mattila
  • Markus Turunen
  • Mervi Paulasto-Kröckel
  • Jorma K. Kivilahti
Chapter
Part of the Microsystems book series (MICT)

Abstract

The most common stress factors and related failure mechanisms in electronic devices at different interconnection levels are presented. The emphasis is placed on the miniaturised heterogeneous structures of microsystems, which are composed of different types of materials in contact with each other. The interfacial reactions between the materials and their environment are examined from manufacturability, functionality and reliability points of view.

Keywords

Wafer Bonding Solder Interconnection Fusion Bonding Embed Component Eutectic Bonding 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    W. Brown, Advanced Electronic Packaging—with emphasis on Multichip Modules (IEEE Press, New York, 1999)Google Scholar
  2. 2.
    R. Tummala, Introduction to System-on-Package—Miniaturization of the Entire System (McGraw-Hill, New York, 2008)Google Scholar
  3. 3.
    J. Liu, O. Salmela, J. Särkkä, J.E. Morris, P.-E. Tegehall, C. Andersson, Reliability of Microtechnology (Springer, New York, 2011)CrossRefGoogle Scholar
  4. 4.
    J.H. Lau, Thermal Stress and Strain in Microelectronics Packaging (Van Nostrand Reinhold, New York, 1993)Google Scholar
  5. 5.
    N. Noolu, N. Murdeshwar, K. Ely, J. Lippold, W. Baeslack, Phase transformations in thermally exposed Au–Al ball bonds. J. Electron. Mater. 33(4), 340–352 (2004)CrossRefGoogle Scholar
  6. 6.
    IVF, The Nordic Electronics Packaging Guideline, Chapter: B. Flip-ChipGoogle Scholar
  7. 7.
    K.J. Rönkä, F.J.J. van Loo, J.K. Kivilahti, The local nominal composition–Useful concept for microjoining and interconnection applications. Scripta Mater. 37(10), 1575–1581 (1997)CrossRefGoogle Scholar
  8. 8.
    J.E. Sergent, A. Krum, Thermal Management Handbook for Electronic Assemblies (McGraw-Hill, New York, 1998)Google Scholar
  9. 9.
    C. Coombs, Printed Circuits Handbook (McGraw-Hill, New York, 2001)Google Scholar
  10. 10.
    J.F. Burgess, C.A. Neugebauer, RwoH integral package for MCM using the GE HDI process with a metal barrier, Electronic Components and Technology Conference, in Proceedings, (1993) pp. 948–950Google Scholar
  11. 11.
    W. Daum, W. Burdick, R. Fillion, Overlay high-density interconnect: a chips-first multichip module technology. Computer 26(11), 23–29 (1993)CrossRefGoogle Scholar
  12. 12.
    A. Kujala, R. Tuominen, J.K. Kivilahti, Solderless interconnection and packaging technique for active components, in The Proceedings of the 49th IEEE Electronic Components and Technology Conference, San Diego, 1–4 June 1999 pp. 155–159Google Scholar
  13. 13.
    R. Tuominen, J.K. Kivilahti, A novel IMB technology for integrating active and passive components, in The Proceedings of The 4th International Conference on Adhesive Joining & Coating Technology in Electronics Manufacturing, Helsinki, 18–21 June 2000, pp. 269–273Google Scholar
  14. 14.
    A. Ostmann, A. Neumann, Chip in Polymer–Next Step in Miniaturization, Adv. Microelectron. 29, 3 (2002)Google Scholar
  15. 15.
    IPC 7095B, Design and Assembly Process Implementation for BGAs. Accessed March 2008Google Scholar
  16. 16.
    K. Puttliz, K. Stalter, Handbook of Lead-Free Solder Technology for Microelectronic Assemblies (Marcel Dekker, New York, 2004)CrossRefGoogle Scholar
  17. 17.
    R. Mroczkowski, Electronic Connector Handbook (McGraw Hill, New York, 1998)Google Scholar

Copyright information

© Springer-Verlag London 2012

Authors and Affiliations

  • Tomi Laurila
    • 1
  • Vesa Vuorinen
    • 1
  • Toni T. Mattila
    • 1
  • Markus Turunen
    • 1
  • Mervi Paulasto-Kröckel
    • 1
  • Jorma K. Kivilahti
    • 1
  1. 1.School of Electrical EngineeringAalto UniversityEspooFinland

Personalised recommendations