Abstract
Technology downscaling has stressed the use of sub-1V V DD to maintain device reliability. In this book, high-/mixed-voltage RF and analog CMOS circuits have been presented as the technology comes of age, being apposite for realizing high-performance wireless systems in ultra-scaled CMOS technologies. Dual voltage supplies have become very common since the deployment of nm-length CMOS processes such as the 90-nm node. We also believe that multiple supplies offering a VDD-on-demand approach will be more efficient in overall system power savings. This book explored a number of analog and RF circuit techniques. From block level to sub-system level, the techniques led to enhanced performances, lower power and cost. When design-for-reliability (i.e., prevent overstress on any device) is included in the design flow, an elevated V DD outpacing the technology roadmap directly opens up more flexibility in defining circuit topologies while preserving sufficient voltage headroom for signal swing. Table 6.1 summarizes the design considerations of analog and RF circuits with different degrees of freedom, namely area, current and the topic of this research, supply.
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© 2012 Springer Science+Business Media New York
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Mak, PI., Martins, R.P. (2012). Conclusions. In: High-/Mixed-Voltage Analog and RF Circuit Techniques for Nanoscale CMOS. Analog Circuits and Signal Processing. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-9539-1_6
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DOI: https://doi.org/10.1007/978-1-4419-9539-1_6
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