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FPGA Design pp 29-40 | Cite as

Board Design

  • Philip Simpson
Chapter

Abstract

In order to meet the fast performance and high bandwidth of today’s system designs, FPGA devices are providing a large number of pins with increasingly faster switching speeds. These higher package pin counts, together with the fact that the devices support many different I/O standards and support different package types, creates a challenge in successfully creating the FPGA pin-out efficiently and correctly. The cost of a board re-spin, due to a problem with the pin-out, is expensive in terms of both the cost of the board re-spin and the impact on the project schedule.

Keywords

Print Circuit Board Signal Integrity FPGA Device Power Plane Power Supply Noise 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  1. 1.Altera CorporationSan JoseUSA

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