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The Specification Language SpecC within the PARADISE Design Environment

  • A. Rettberg
  • F. J. Rammig
  • A. Gerstlauer
  • D. D. Gajski
  • W. Hardt
  • B. Kleinjohann
Chapter
Part of the IFIP — The International Federation for Information Processing book series (IFIPAICT, volume 61)

Abstract

The design of embedded systems has to address several interacting design aspects, so-called dimensions, to capture parallelism, distribution over different locations and hard real-time requirements. Thus, a structured design process has been established with the PARADISE design environment. The design process covers all steps from behavioral specification to final chip realization. In this paper, we describe how system specification and refinement is covered in combination with the processes available in PARADISE. An example of an adequate specification and modeling language is considered and adapted for integration into PARADISE. First results show the feasibility of integrating the respective concepts.

Keywords

Design Environment Design Dimension Design Space Exploration Schedulability Analysis European Telecommunication Standard Institute 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© IFIP International Federation for Information Processing 2001

Authors and Affiliations

  • A. Rettberg
    • 1
  • F. J. Rammig
    • 1
  • A. Gerstlauer
    • 2
  • D. D. Gajski
    • 2
  • W. Hardt
    • 3
  • B. Kleinjohann
    • 1
  1. 1.Department of Computer ScienceUniversity Paderborn/C-LABGermany
  2. 2.Center for Embedded Computer SystemsUniversity of California at IrvineUSA
  3. 3.Department of Computer Science (IPL)University PaderbornGermany

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