In this paper we introduce a complex allocation and scheduling problem for variable voltage Multi-Processor System-on-Chip (MPSoC) platforms. We propose a methodology to formulate and solve to optimality the allocation, scheduling and discrete voltage selection problem, minimizing the system energy dissipation and the overhead for frequency switching. Our approach is based on the Logic Benders decomposition technique where the allocation is solved through an Integer Programming solver, and the scheduling through a Constraint Programming solver. The two solvers are interleaved and their interaction regulated by cutting plane generation. The objective function depends on both master and sub-problem variables. We demonstrate the efficiency of our approach on a set of realistic instances.


Shared Memory Clock Cycle Constraint Programming Master Problem Setup Cost 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Luca Benini
    • 1
  • Davide Bertozzi
    • 2
  • Alessio Guerri
    • 1
  • Michela Milano
    • 1
  1. 1.DEISUniversity of BolognaBolognaItaly
  2. 2.Dipartimento di IngegneriaUniversity of FerraraFerraraItaly

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