Abstract
Reversible MOS or r-MOS is a logic family that inherently promises asymptotically-zero power consumption. We deduce a simple formula for calculating the power consumption. It rightly highlights the unfortunate influence of the threshold voltages of the MOS transistors.
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De Vos, A., Van Rentergem, Y. (2005). Power Consumption in Reversible Logic Addressed by a Ramp Voltage. In: Paliouras, V., Vounckx, J., Verkest, D. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2005. Lecture Notes in Computer Science, vol 3728. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11556930_22
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DOI: https://doi.org/10.1007/11556930_22
Publisher Name: Springer, Berlin, Heidelberg
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