Effect of Metallic Strip Deposition Within the Source Dielectric with Applied Double Metallic Drain for Enhanced DC/RF Behavior of Charge Plasma TFET for Low-Power IOT Applications

  • Mohd. AslamEmail author
  • Dheeraj Sharma
  • Deepak Soni
  • Shivendra Yadav
Conference paper
Part of the Smart Innovation, Systems and Technologies book series (SIST, volume 141)


Wide tunneling barrier is always a hurdle to achieve acceptable electrical behavior for charge plasma TFET. Poor tunneling rate of charge carriers results in the degraded switching speed of the charge plasma TFET for low-power analog applications. In this concern, deposition of a thin metallic strip within the dielectric at channel/source junction enhances the DC characteristics like threshold voltage, subthreshold swing, and ON current of the device. Simultaneously, double metallic drain technique employed at drain side reduces ambipolar (negative conduction) nature of device. This article consists of a comparative analysis of conventional charge plasma TFET with modified structure. Inverter implementation of conventional and modified structures is also performed for the adaptability of devices for low-power IoT applications.


BTBT Metallic strip Work function 


  1. 1.
    Koswatta, S.O., Lundstrom, M.S., Nikonov, D.E.: Performance comparison between p-i-n tunneling transistors and conventional MOSFETs? IEEE Trans. Electron Devices 56(3), 456–465 (2007)CrossRefGoogle Scholar
  2. 2.
    Jhaveri, R., Nagavarapu, V., Woo, J.C.S.: Effect of pocket doping and annealing schemes on the source-pocket tunnel field-effect transistor. IEEE Trans. Electron Devices 58(1), 80–86 (2011)CrossRefGoogle Scholar
  3. 3.
    Kumar, M.J., Janardhanan, S.: Doping-less tunnel field effect transistor: design and investigation. IEEE Trans. Electron Devices 60(10), 3285–3290 (2013)CrossRefGoogle Scholar
  4. 4.
    Colinge, J.-P.: FinFETs and Other Multi-gate Transistors. Springer, New York (2008)CrossRefGoogle Scholar
  5. 5.
    Aslam, M., Yadav, S., Soni, D., Sharma, D.: A new design approach for enhancement of DC/RF performance with improved ambipolar conduction of dopingless TFET. Superlattices Microstruct. 112, 86–96 (2017)CrossRefGoogle Scholar
  6. 6.
    Ionescu, A.M., Riel, H.: Tunnel field-effect transistors as energy-efficient electronic switches. Nature 479(7373), 329–337 (2011)CrossRefGoogle Scholar
  7. 7.
    Avci, U.E., Morris, D.H., Young, I.A.: Tunnel field-effect transistors: prospects and challenges. IEEE J. Electron Devices Soc. 3(3), 88–95 (2015)CrossRefGoogle Scholar
  8. 8.
    Soni, D., Sharma, D., Aslam, M., Yadav, S.: A novel approach for the improvement of electrostatic behaviour of physically doped TFET by using plasma formation and shortening of gate electrode with hetero gate dielectric. Appl. Phys. A 124, 306 (2018)Google Scholar
  9. 9.
    Yadav, S., Sharma, D., Soni, D., Aslam, M.: Controlling ambipolarity with improved RF performance by drain/gate work function engineering and using high k dielectric material in electrically doped TFET: proposal and optimization. J. Comput. Electron. 16, 721–731 (2017)Google Scholar
  10. 10.
    Zhang, Q., Zhao, W., Seabaugh, A.: Low-subthreshold-swing tunnel transistors. IEEE Electron Device Lett. 27(4), 297–300 (2006)CrossRefGoogle Scholar
  11. 11.
    Choi, W.Y., Park, B.G., Lee, J.D., Liu, T.J.K.: Tunneling field-effect transistor (TFETs) with subthreshold swing (SS) less than 60 mV/Dec. IEEE Electron Device Lett. 28(8), 743–745 (2007)CrossRefGoogle Scholar
  12. 12.
    Damrongplasit, N., Shin, C., Kim, S.H., Vega, R.A., Liu, T.J.K.: Study of random dopant fluctuation effects in germanium-source tunnel FETs. IEEE Trans. Electron Devices 58(10), 3541–3548 (2011)CrossRefGoogle Scholar
  13. 13.
    Bashir, F., Loan, S.A., Rafat, M., Alamoud, M.R.M., Abbasi, S.A.: A high performance gate engineered charge plasma based tunnel field effect transistor. J. Comput. Electron. 14, 477–485 (2015)CrossRefGoogle Scholar
  14. 14.
    Vijayvargiya, V., Vishvakarma, S.K.: Effect of drain doping profile on double-gate tunnel field-effect transistor and its influence on device RF performance. IEEE Trans. Nanotechnol. 13(5), 974–981 (2014)CrossRefGoogle Scholar
  15. 15.
    Raad, B.R., Tirkey, S., Sharma, D., Kondekar, P.: A new design approach of dopingless tunnel FET for enhancement of device characteristics. IEEE Trans. Electron Devices 64(4), 1830–1836 (2017)CrossRefGoogle Scholar
  16. 16.
    Aslam, M., Sharma, D., Yadav, S., Soni, D., Bajaj, V.: A new design approach for enhancement of DC/RF characteristics with improved ambipolar conduction of charge plasma TFET: proposal, and optimization. Appl. Phys. A 124, 342 (2018)CrossRefGoogle Scholar
  17. 17.
    ATLAS Device Simulation Software: Silvaco Int. Santa Clara, CA, USA (2014)Google Scholar
  18. 18.
    Yang, Y., Tong, X., Yang, L.T., Guo, P.F., Fan, L., Yeo, Y.C.: Tunneling field-effect transistor: capacitance components and modeling. IEEE Electron Device Lett. 31(7), 752–754 (2010)CrossRefGoogle Scholar
  19. 19.
    Madan, J., Chaujar, R.: Interfacial charge analysis of heterogeneous gate dielectric-gate all around-tunnel fet for improved device reliability. IEEE Trans. Device Mater. Reliab. 16(2), 227–234 (2016)CrossRefGoogle Scholar
  20. 20.
    Chen, Y.N., Fan, M.L., Hu, V.P.H., Su, P., Chuang, C.T.: Design and analysis of robust tunneling FET SRAM. IEEE Trans. Electron Devices 60(3), 1092–1098 (2013)CrossRefGoogle Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Mohd. Aslam
    • 1
    Email author
  • Dheeraj Sharma
    • 1
  • Deepak Soni
    • 1
  • Shivendra Yadav
    • 2
  1. 1.PDPM Indian Institute of Information Technology, Design and ManufacturingJabalpurIndia
  2. 2.Rajeev Gandhi Memorial College of Engineering and Technology NandyalKurnoolIndia

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