Abstract
This paper presents in front of us a novel approach for the optimal design of a Low Noise Amplifier (LNA) with inductive source degeneration circuit using a recently proposed evolutionary optimization technique called PSO with Aging Leader and Challenger (ALC-PSO). The proposed ALC-PSO based approach has succeeded in dealing with the disadvantages faced by PSO algorithm and is employed in this paper for the optimal design of LNA circuit. The MOSFET widths and component’s values are optimized by using ALC-PSO algorithm in order to maximize the gain, minimize the Noise Figure (NF) and to optimize the overall performance of the LNA circuit. The simulation results obtained for the designed LNA circuit confirm the effectiveness of the ALC-PSO based approach over PSO in terms of solution quality, design specifications, and design objectives. The optimally implemented LNA circuit in 0.35 µm CMOS technology yields the gain of 18.64 dB, noise figure of 1.779 dB and power dissipation of 10.60 mW.
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Mallick, S., Kar, R., Mandal, D., Dasgupta, T., Ghoshal, S.P. (2019). Optimal Design of 2.4 GHz CMOS LNA Using PSO with Aging Leader and Challenger. In: Bhatia, S., Tiwari, S., Mishra, K., Trivedi, M. (eds) Advances in Computer Communication and Computational Sciences. Advances in Intelligent Systems and Computing, vol 759. Springer, Singapore. https://doi.org/10.1007/978-981-13-0341-8_27
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DOI: https://doi.org/10.1007/978-981-13-0341-8_27
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