Overview
- Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP
- Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security
- Introduce designers to the concept of salutary hardware, difficult to circumvent embedded hardware security systems
- Includes supplementary material: sn.pub/extras
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Table of contents (10 chapters)
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Front Matter
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Back Matter
Keywords
About this book
This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection.
Editors and Affiliations
About the editors
Lilian Bossuet is an Associate Professor at University of Saint-Etienne, head of the Embedded System Security group and head of the Computer Science departement of the Laboratoire Hubert Curien. His research is in the general area of embedded systems design, including hardware security of embedded systems (data, intellectual property and system security) and reconfigurable hardware design. His active research topics focus on Hardware security, war against illegal IC copy and counterfeiting, IP protection, PUF design and characterization, side channel attacks and countermeasures, TRNG attack, MCryptoPSoC architecture and design, crypto-processor architecture and design, embedded system security, and FPGA security.
Lionel Torres is Professor at the University of Montpellier (Polytech Montpellier engineering school), France. His research activities is part of the microelectronic department of the Laboratory of Informatics, Robotics and Microelectronics of Montpellier (laboratory to the University of Montpellier and the French National Center for Scientic Research (CNRS)). His research interests concern system level architecture, with a specific focus in the security and cryptographic applications and Non-Volatile Computing based on MRAM. He has a PhD from the University of Montpellier in microelectronic design and was at the head of the microelectronic department of LIRMM and he is now deputy head of Polyptych Montpellier and at the Head of the Labex (Laboratory of Excellence) of Digital and Hardware Solutions, Environmental and Organic Life Modeling. He is also co-founder of the Algodone company, company proposing a Digital Right Management solution for silicon IP.
Bibliographic Information
Book Title: Foundations of Hardware IP Protection
Editors: Lilian Bossuet, Lionel Torres
DOI: https://doi.org/10.1007/978-3-319-50380-6
Publisher: Springer Cham
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer International Publishing AG 2017
Hardcover ISBN: 978-3-319-50378-3Published: 17 January 2017
Softcover ISBN: 978-3-319-84385-8Published: 13 July 2018
eBook ISBN: 978-3-319-50380-6Published: 10 January 2017
Edition Number: 1
Number of Pages: VII, 240
Number of Illustrations: 77 b/w illustrations, 48 illustrations in colour
Topics: Circuits and Systems, Processor Architectures, Electronics and Microelectronics, Instrumentation