Introduction

Thin-film transistors based on metal source- and drain-regions are easy and cheap to fabricate, and are used in many applications including display technology and bio-sensing [1]. A number of fabrication techniques (including pulsed laser deposition [2] and sputtering [3]) have been used to deposit amorphous TFT-semiconductor materials including hydrogenated silicon (a-Si:H) [4], and indium–gallium–zinc–oxide (IGZO) [5]. TFTs can be fabricated on conventional silicon wafers, silicon on insulator [6], and flexible substrates [7]. Since many thin-film semiconductor materials are transparent, even optically transparent transistors can be fabricated [8].

TFTs are similar to Schottky–Barrier transistors (SBMOS) [9], since in both devices Schottky junctions are formed between source and channel, and drain and channel, respectively. In TFTs these Schottky junctions are made of metal/semiconductor contacts, whereas for SBMOS these junctions are typically made of metal-silicides such as NiSi [10]. Since ion-implantation is not required for SBMOS fabrication, atomically abrupt junctions can be fabricated offering a high scalability and suppressed drain-induced barrier lowering [11]. Despite the similarity to the SBMOS, TFTs target different applications due to the significantly lower charge carrier mobility in amorphous semiconductors. For example, a-Si:H lacks of band conduction and conductivity is driven by hopping between localized tail-states. This results in significantly smaller charge carrier mobilities (µn ≈ 0.1–2 cm2/Vs of electrons and µp ≈ 10−4 cm2/Vs of holes [12]) in a-Si:H TFTs compared to CMOS-transistors (µn ≈ 103 cm2/Vs and µp = 102 cm2/Vs [13]). In contrast to a-Si:H, IGZO is naturally transparent and offers higher charge carrier mobilities (µ > 10 cm2/Vs [14]), which makes it attractive for fast-response TFTs used for LED displays. Further improvement of the performance of IGZO-based transistors is in focus of research to fabricate even larger high-resolution (8 K) and more energy-efficient displays, or even unlocking the device potential for new application fields such as cheap and flexible analogue or digital electronics.

This study reports on the fabrication of IGZO-based TFTs with various source/drain metals. The device performance is compared to a-Si:H TFTs. IGZO-devices are fabricated completely at room temperature without any post-thermal treatment, which is highly attractive for fabrication of TFTs for displays. Special attention is paid to the transistor characteristics, in particular the saturation mobility and sub-threshold behavior by finding the right choice of the source-/drain-electrode material.

Experimental details

Top-gated thin-film transistors based on IGZO have been fabricated with a channel width W = 10 µm and a channel length L = 2 µm. a-Si:H TFTs were fabricated in a previous study [15] and are used as reference transistors here. Oxidized silicon wafers (SiO2 thickness 650 µm) with an additional TiO2 adhesion layer (thickness 10 nm) were used as substrates. The source- and drain-regions (S/D-regions, thickness 30 nm) were prepared by direct-current (DC) sputtering. For substrative pattern transfer of source and drain UV lithography and reactive ion-etching (RIE) were used. For this step, AZ 5214E image reversal resist was diluted 6:5 in 1-methoxy-2-propanol acetate for patterning of S/D-regions. For a-Si:H TFTs only Pt is used as source- and drain-contacts. In case of IGZO TFTs the S/D regions were made of Pt, Ti and W, respectively. Afterwards, the amorphous semiconductor was deposited at room temperature (thickness 50 nm). IGZO was RF-sputtered (IGZO target, purity 5 N) using a mixture of Ar and O2 with a total constant flowrate Qtot = QOx + QAr = 30 sccm, where QOx is the flowrate of oxygen, yielding again a process pressure of 5.4 × 10−3 hPa. Best electrical characteristics were found for QOx = 0, which is used for device fabrication. X-ray reflectivity (XRR) was used for characterization of the thin-film density (see below). While no additional heat treatment was used for IGTO based TFTs, a-Si:H based TFTs were annealed in forming gas (4% H2 in N2) using rapid thermal annealing (800 °C for 5 min) after Si deposition. Further details on the fabrication of a-Si:H TFTs can be found in Ref. [15]. In a next step, 10 nm thick Al2O3 was electron-beam evaporated and is acting as gate-dielectric. The semiconductor + Al2O3 layers were microstructured using a single UV lithography step followed by RIE in Ar-plasma. Afterwards, 30 nm Pt was deposited as gate-electrode and patterned using a lift-off process. A schematic of the sample structure is shown in Fig. 1a (lateral view) and Fig. 1b (cross-sectional view). An optical microscopy image of a fabricated transistor is shown in Fig. 1c. For device characterization a HP 4155B Semiconductor Analyzer was used.

Fig. 1
figure 1

a Schematic of the TFT structure. The inset depicts a zoom into the channel region. b Cross-sectional view of a TFT structure. c Optical microscopy image of a fabricated IGZO-based transistor

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Results and discussion

For IGZO TFTs special attention was paid to the deposition process. The densities and thickness of thin-films fabricated by different oxygen flows were extracted from simulated fitting-curves of their XRR spectra (Fig. 2a). For readability in Fig. 2a, the XRR spectra are shifted by a fixed scale factor (between 1 and 104): e.g. the spectrum for QOx = 5 sccm is multiplied by a factor of 10. From the thickness the deposition rate can be calculated, which decreases by increase of QOx from 1.85 to ≈ 0.6 Å/s (Fig. 2b), as expected for reactive sputtering. Total reflection is present at the critical angle \({\Theta }_{\mathrm{C}}\) which is proportional to the square root of the density [16]. Based on the measurements, simulated fitting curves reveal a density of 5.4–6.15 g/cm3 (Fig. 2b) which is slightly lower than single-crystal IGZO (6.4 g/cm3) but similar to reports in literature [17]. For larger oxygen flows one finds a density of up to 6.15 g/cm3. For QOx = 0 the density is 6 g/cm3. The smallest density of 5.4 g/cm3 is found for QOx = 0.4. Formation of a mesoporous morphology could be a reason for such a drop of the density.

Fig. 2
figure 2

a XRR-spectra of IGZO thin-films sputtered with different oxygen flows. The XRR spectra are shifted by a fixed factor (between 1 and 104) for readability. b Density and deposition rate of IGZO thin-films for various oxygen flows

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The output characteristics (i.e. drain current ID vs. drain-source-voltage VDS) of IGZO and a-Si:H TFTs are depicted in Fig. 3a to d for variable gate-source-voltage VGS. a-Si:H based TFTs [15] are used as reference devices. The drain current in the saturation regime is:

$${I}_{\mathrm{D}}=\frac{1}{2}{g}_{\mathrm{m}}{\left({V}_{\mathrm{GS}}-{V}_{\mathrm{th}}\right)}^{2},$$
(1)

where \({g}_{m}\) is the transconductance parameter, and Vth is the threshold voltage. Using the transconductance parameter \( g_{{\text{m}}} \sim \left. {{\text{d}}I_{{\text{D}}} /{\text{d}}V_{{{\text{GS}}}} } \right|_{{V_{{{\text{DS}}}} }} \sim \mu \cdot C_{{\text{G}}}^{\prime } \cdot W/L \) the charge carrier saturation mobility µ is found, which is an important performance parameter:

Fig. 3
figure 3

a–c Output characteristics of IGZO-based TFTs with S/D-regions made of Ti, Pt, and W, respectively, for variable VGS. d Output characteristics of an a-Si:H based TFT with S/D-regions made of Pt, for comparison for variable VGS. Redrawn from Ref. [15] with permission from IOP Publishing. The inset in a–d depict the transfer-characteristics (ID vs VGS) in linear scale of each device, respectively. e Transfer-characteristic in semi-log scale of a Ti-based IGZO TFT. f Comparison of the saturation mobility and inverse sub-threshold slope vs. work function of the source/drain metals for IGZO TFTs

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$$ \mu = \frac{{2L}}{{C_{{\text{G}}}^{\prime } W}}\, \times \,\left( {\frac{{{\text{d}}\sqrt {I_{{\text{D}}} } }}{{{\text{d}}\sqrt {V_{{{\text{GS}}}} } }}} \right)^{2} $$
(2)

Here, CG′ ≈ 0.8 × 10−6 F/cm2 is the specific gate capacity. For IGZO based transistors a mobility of µ ≈ 24 cm2/Vs for S/D = Pt, µ ≈ 45 cm2/Vs for S/D = W, and µ ≈ 50 cm2/Vs for S/D = Ti is found, respectively. These are competitive values compared to µ ≈ 70 cm2/Vs for high mobility IGZO TFTs [14]. For a-Si:H one finds µ ≈ 0.45 cm2/Vs [15], which is in the range of values reported in the literature (µ ≈ 0.1–2 cm2/Vs [12]). In contrast to a-Si:H TFTs, the slope for IGZO TFTs for VDS < 2 V is relatively flat which could be attributed to a parasitic diode-behavior of one of the metal/semiconductor junctions. This behavior has been observed for all metals studied here, including inert Pt. Therefore, this effect cannot be explained by formation of oxide interfaces during processing. Since IGZO was sputtered without additional oxygen flow, a decrease of the defect density, and thus, a decrease of the electron concentration could lead to a drain-side diode-behavior, similar to what has been observed for Schottky-type drain-IGZO junctions [18].

In addition, a local maximum of ID between the linear and saturation regime is observed. This behavior has been observed mainly for W and Ti based S/D-regions. Since this signature tends to increase by increase of the gate-source-voltage (and thus drain-current) a reason for this effect could be drain-current induced local heating of the semiconductor. Several studies demonstrated a self-heating induced shift of the threshold-voltage [19,20,21], however, usually reported for relatively large channel-widths (i.e. W > 100 µm) [22]. Here, the channel-width is much smaller but the normalized drain-current (ID/W > µA/µm) is similar or even higher compared to studies reporting self-heating effects. It should be noted that this effect did not result in a device degradation in this study. Relatively low drain currents are measured for Pt-based devices (e.g. ID ≈ 10 µA for Pt-IGZO at VGS = 5 V and VDS = 7 V; compared to ID ≈ 550 µA for Ti-, and ID ≈ 380 µA for W-based transistors for VGS = 5 V and VDS = 7 V, respectively). Thus, the self-heating effect in IGZO may be here more dominant in W- and Ti-based devices than in Pt-IGZO TFTs due to the higher drain currents. In fact, this self-heating effect is also not observed for low-drain currents in Ti- and W-IGZO (e.g. VGS < 2 V).

An example of a transfer-characteristic, i.e. ID (in semi-log-scale) vs. VGS, of an IGZO-based TFT with Ti S/D-regions for a fixed VDS = 7 V is shown in Fig. 3e. From Fig. 3e, the inverse sub-threshold slope (SS) can be calculated:

$$\mathrm{SS}={\left(\frac{\mathrm{\delta log}{I}_{\mathrm{D}}}{\updelta {V}_{\mathrm{GS}}}\right)}^{-1}$$
(3)

The inverse sub-threshold slope is an important transistor property determining the switching behavior of the transistor. Here, three regimes can be identified: A deep-sub-threshold regime (A) is present for VGS approx. < 1 V with a SS of 0.2 V/dec, (B) a weak ON-state sub-threshold regime [18] for approx. 1 V < VGS < 2.5 V with a swing of SS = 0.5 V/dec, and an ON-state (C) for VGS > 2.5 V.

A relation between the S/D material, and saturation charge carrier mobility and the inverse sub-threshold slope is depicted in Fig. 3f. The largest mobility and smallest SS is found for Ti (work function 4.33 eV). In contrast, Pt (work function 5.65 eV) S/D regions resulted in a mobility almost twice as low compared to Ti and a SS of 0.82 V/dec.

Only little has been reported on the impact of the S/D material on the TFT properties. Choi et al. reported higher saturation mobilities for Ti compared to Ag [23]. Barquinha et al. investigated the impact of Mo, Ti and Ti/Au as S/D materials on the TFT performance. The authors reported higher saturation mobilities for Au and Mo compared to Ti. The inverse sub-threshold slope (≈ 1 V/dec. for all Mo, Ti and Ti/Au) were not specifically mentioned in the study but can be approximated from the transfer characteristics. Yim et al. [24] investigated Mo-, Cu- and Al-based IGZO-TFTs with and without air-annealed thermal treatment, respectively. Without thermal treatment, Mo- and Cu-based devices showed inverse sub-threshold slopes of 0.5 V/dec. A transistor behavior was not observed for Al-based devices at first, but the device behavior changed after thermal treatment. With Time-of-Flight Secondary Mass Spectroscopy the authors found that Cu diffused into IGZO after annealing, whereas Al forms an oxide interface between S/D regions and channel. The Al-based devices showed conventional transistor characteristics after thermal treatment. The authors contributed this to the formation of an interface resulting in a higher electron concentration in IGZO and therefore a negative threshold voltage. In case of Cu, inter-diffusion leads to an increase of Vth and an increase of SS. For Mo, SS kept constant, but Vth decreased due to a reduction of the oxygen vacancy concentration.

Table 1 summarizes important thin-film transistor characteristics reported in this study and literature. The devices are based on either bottom-gate, top-gate or even source-gated transistor structures [28] with different geometries. These differences result in different threshold-voltages, maximum saturation mobilities, inverse sub-threshold slopes, drain-side diode phenomena, and potential inter-diffusion or interface reactions. Thus, device comparison is difficult. In this study, one finds higher saturation mobilities for relatively low work function metals (e.g. Ti and W compared to Pt). However, this trend is not observed in all cases. For example, Lin et al. reported of µ = 26 cm2/Vs for Ti [30] compared to µ = 10 cm2/Vs for Ni as reported by Sporea et al. [28], Barquinha et al. reported of higher mobilities in case of Ti/Au (µ = 18.7 cm2/Vs) and Mo (µ = 17.4 cm2/Vs) compared to Ti (µ = 16.9 cm2/Vs) [29]. Nevertheless, there is qualitative evidence that the work function of the S/D material has a general impact on the transistor performance. In this study, where transistors with the same geometry and fabrication methods are prepared, a higher work function results in a smaller saturation mobility and a larger inverse sub-threshold slope. This could be attributed to the drain-channel contact: by increase of VDS the electron concentration at the drain-side is lowered, which leads to the formation of a space-charge layer in the saturation regime. The electron concentration at the source-channel junction keeps relatively constant and the junction is in forward bias. Thus, the drain-channel junction could play a dominant role for both the mobility and the inverse sub-threshold slope, presumably due to the formation of an additional material-depended diode-behavior.

Table 1 Overview of important TFT characteristics reported in this study and literature for a-Si:H- and IGZO-based TFTs
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Conclusions

This study reports on the fabrication of thin-film transistors based on a-Si:H and IGZO with different source/drain metals (Pt, W and Ti). From the output-characteristics one finds saturation mobilities of 0.45 cm2/Vs of Pt/a-Si:H, and µ ≈ 24 cm2/Vs for Pt/IGZO, µ ≈ 45 cm2/Vs for W/IGZO, and µ ≈ 50 cm2/Vs for Ti/IGZO. These values are competitive to high-performance IGZO-transistors. From the transfer-characteristics two slopes (0.2 V/dec and 0.5 V/dec) in the deep-sub-threshold and weak ON-state regime are found, which are similar to literature values. As a rough estimate, the study finds that high saturation mobilities and small inverse sub-threshold slopes are found for S/D metals with relatively low work functions, which could be caused by a diode-behavior of the drain-channel junction.