Material aspects of giga-Hertz ZnO TFTs for wireless systems

Abstract

Having enabled high-value application capabilities through mass production of flat-panel displays, X-ray imagers, and solar panels, Large-Area Electronics (LAE) holds potential to open new frontiers in wireless applications for the Internet of Things and 5G/6G, by enabling unprecedented spatial control and power efficiency through large size and flexible form factor of radiative apertures. However, this requires boosting operation frequencies from the traditional limits in the range of 10–100’s of mega-Hertz to multi giga-Hertz. In this paper, we discuss critical device metrics, to characterize zinc-oxide (ZnO) thin-film transistor (TFT) operation frequency for both active (for signal amplification) and passive components in LAE-based circuits and systems. We then describe the key structural and material approaches towards recently demonstrated LAE-based giga-Hertz wireless systems employing ZnO TFTs. Bringing LAE to the giga-Hertz regime provides a path towards flexible and meter-scale monolithic integrated wireless systems.

Graphical abstract

Introduction

Large-Area Electronics (LAE) has been widely used in flat-panel displays, X-ray imagers, and solar panels, with internal circuits operating at frequencies up to ~ 100 MHz [1, 2]. With the large substrate size and flexible form factor enabled by LAE, recent research shows the unique benefits of using LAE for wireless applications for the Internet of Things (IoT) and 5G/6G. This necessitates bringing LAE to the giga-Hertz regime [3,4,5,6].

Future wireless systems envision steering of antenna radiation beams, in order to spatially address densely distributed sensor nodes. The key enabler for such systems is a multi-element directional antenna, where the direction of the radiation beam can be set by controlling the radiative elements, as shown in Fig. 1a. The spatial resolution of radiating beams is a critical metric, and is determined by the ratio of antenna size $D$ to radiation wavelength $\lambda$. Higher $D/\lambda$ values provide higher spatial resolution, and typically $D/\lambda >10$ is required for practical systems. A comparison of LAE and Si-CMOS technologies in Fig. 1b illustrates LAE’s advantages for such applications. Although Si-CMOS is capable of operation to hundreds of GHz, the limited achievable chip size requires system operation frequency to above $\sim$ 100 GHz. At such frequencies the radiation range is substantially degraded due to the strong signal loss in air [7, 8]. Alternatively, bringing LAE (with meter-scale $D$ for large radiative apertures) to the GHz regime opens a new circuit/system design space for achieving large $D/\lambda$. This frequency range is of particular interest for low-power wireless communication (such as Wi-Fi and Bluetooth) and sensing.

Fig. 1

a Schematic of a multi-element directional antenna with direction of radiation beams controlled through tuning the relative phase of each individual radiative antenna element. b Comparison of the size of an integrated antenna and the operation frequency achievable by LAE and Si-CMOS technologies

This paper starts by examining the key device metrics for high-frequency operation of LAE TFTs, namely, the unity current gain frequency ${f}_{\text{T}}$ and the unity power gain frequency ${f}_{\text{MAX}}$ for active components, and the off-to-on impedance ratio $\left|{Z}_{\text{OFF}}/{Z}_{\text{ON}}\right|$ for passive components. After establishing connections between these metrics and fundamental material and device parameters, the structural and material approaches towards giga-Hertz ZnO TFTs are elaborated. Based on the TFT advances, we introduce two prototypes of the LAE-based multi-element directional antennas: (i) a 1 GHz phased array; and (ii) a 2.4 GHz reconfigurable antenna.

Materials and methods

Figure 2a shows the schematic of the bottom-gate ZnO TFT used in our work. The gate electrode is a composite stack of Cr/Al/Cr, deposited by thermal evaporation and patterned by wet etching. The gate dielectric (40 nm Al₂O₃), the semiconductor (10 nm ZnO), and the passivation (35 nm Al₂O₃) are deposited by plasma-enhanced atomic layer deposition. The source and drain (S/D) regions are patterned by self-alignment (details in Results and Discussions) and the S/D contacts are Ti/Au bilayers. The overlap between S/D to gate (${L}_{\text{OV}}$) introduces parasitic capacitance, which limits the device operation frequency.

Fig. 2

a Schematic of a bottom-gate ZnO TFT ($L$ = TFT’s channel length; $W$ = TFT’s channel width; ${L}_{\text{OV}}$ = length of overlap between source/drain to gate). b Typical transfer curve of short channel ZnO TFTs ($W/L=150 \mu m/1 \mu m$). c Small-signal models for ${f}_{\text{T}}$ derivation. Left: small-signal model of ideal ZnO TFT with no ${L}_{\text{OV}}$ between S/D to gate; Right: small-signal model of practical ZnO TFT with ${L}_{\text{OV}}$ between S/D to gate. d Schematic of self-alignment process to reduce ${L}_{\text{OV}}$. e Gate resistance (${R}_{\text{G}}$, on the left) and output resistance (${r}_{\text{o}}$, on the right) as examples for sources of power loss within ZnO TFT. f Microscopy image of multi-finger layout that reduces gate resistance, with zoom-in on the channel region

The maximum temperature of device fabrication is < 200 °C, and thus the process is compatible with flexible substrates. A typical transfer curve of short channel ZnO TFTs ($W/L=150 \mu m/1 \mu m$) is shown in Fig. 2b. The mobility (${\mu }_{n}$) and the threshold voltage (${V}_{\text{T}}$) are extracted to be $9.3\pm 2.0 {cm}^{2}/\left(V\bullet s\right)$ and $1.8\pm 0.1 V$ by fitting $\sqrt{{I}_{\text{DS}}}$ vs. ${V}_{\text{GS}}$ curve at ${V}_{\text{GS}}=5\sim 6 V$ and ${V}_{\text{DS}}=6 V$ (saturation region), over 10 long-channel ZnO TFTs ($W/L=150 \mu m/62 \mu m$).

Results and discussion

This section first discusses the relevant device metrics (e.g. to drive antenna elements as in Fig. 1a) and device design approaches for TFTs biased in the saturation region (high ${V}_{\text{DS}}$), where high-frequency (current/power) amplification can be provided. In this “active” case, the device operation frequency is limited by heating from the power dissipated in the TFTs (${V}_{\text{DS}}\bullet {I}_{\text{DS}}$). This finding also motivates system architectures where TFTs are used as gate-controlled switches in the linear region (low ${V}_{\text{DS}}$), to avoid this power limitation. In this role, the TFTs are not used to amplify current/power and hence are referred to as “passive” devices. An alternate device metric for passive TFTs is presented, followed by the demonstration of a multi-element directional GHz antenna employing passive ZnO TFTs.

ZnO TFTs used as “active” devices

The directional antenna of Fig. 1a can be realized with an array of radiative antenna elements, each individually having phase controllability via a circuit based on ZnO TFTs biased in the saturation region [6]. The figures of merit to characterize the operation speed of these active devices are ${f}_{\text{T}}$ (the frequency at which the current gain falls to 1) and ${f}_{\text{MAX}}$ (the frequency at which the power gain falls to 1).

Definition and optimization of ${{\varvec{f}}}_{{\varvec{T}}}$ and ${{\varvec{f}}}_{{\varvec{M}}{\varvec{A}}{\varvec{X}}}$

In high-frequency applications, devices are typically used at a fixed “DC operating point”, and the “signal” is a small high-frequency oscillation (“AC signal”) on top of the DC operating point. ZnO TFTs are biased in the saturation region to provide “small-signal” current gain $\left|{H}_{21}\right|$,

$$\left|{H}_{21}\right|=\left|\frac{{i}_{\text{out}}}{{i}_{\text{in}}}\right|=\left|\frac{{i}_{D}}{{i}_{\text{G}}}\right|$$

where ${i}_{\text{in}}$ represents the small-signal input current to the gate of TFT and ${i}_{\text{out}}$ represents the output current at drain.

The TFT’s transconductance ${g}_{m}$ is defined as $\frac{\partial {I}_{\text{DS}}}{\partial {V}_{\text{GS}}}$ (derivative since the slope indicates voltage-to-current gain at the DC operating point for small-signal operation). Larger ${g}_{m}$ gives larger output current and thus improves current gain. For an ideal TFT, ${g}_{m}={\mu }_{n}{C}_{OX}^{^{\prime}}\frac{W}{L}\left({V}_{\text{GS}}-{V}_{\text{T}}\right)$ in saturation region (${C}_{OX}^{^{\prime}}$ is the gate oxide capacitance per unit area) [9], so higher DC bias voltages increase current gain. Due to the gate capacitances in TFTs, as frequency increases, the input current (for a fixed AC voltage) increases and thus current gain decreases. The frequency at which $\left|{H}_{21}\right|$ decreases to 1 is defined as the unity current gain frequency ${f}_{\text{T}}$, i.e. only below this frequency can a TFT amplify current from input to output. In the ideal case shown in Fig. 2c, ${f}_{\text{T}}=\frac{1}{2\pi }\bullet \frac{{g}_{m}}{{C}_{IN}}$, where the input capacitance ${C}_{IN}={C}_{\text{GS}}=\frac{2}{3}{C}_{OX}^{^{\prime}}\bullet W\bullet L$, resulting in ${f}_{\text{T}}=\frac{1}{2\pi }\bullet \frac{{g}_{m}}{\frac{2}{3}{C}_{OX}^{^{\prime}}\bullet W\bullet L}=\frac{3}{4\pi }\bullet \frac{{\mu }_{n}\bullet \left({V}_{\text{GS}}-{V}_{\text{T}}\right)}{{L}^{2}}$. The key message from a material and structural point of view is that the channel length $L$ should be short and the mobility ${\mu }_{n}$ should be high.

Further, from a physical point of view, one can define “transit time” as ${t}_{transit}=\frac{3}{4\pi }\bullet \frac{1}{{f}_{\text{T}}}$. The transit time is the average time it takes for an electron to go from source to drain, qualitatively explaining why short $L$ and high ${\mu }_{n}$ are desired for high speed operations.

Moving beyond these first-order effects, the overlap of the gate with S/D (${L}_{\text{OV}}$ in Fig. 2a) causes parasitic capacitors between gate and source and between gate and drain (${C}_{OV,GS}$ and ${C}_{OV,GD}$ in Fig. 2c). These lead to a higher input capacitance and thus higher input current. Therefore, the current gain is lower, and ${f}_{\text{T}}$ is $\frac{1}{2\pi }\bullet \frac{{g}_{m}}{{C}_{OX}^{^{\prime}}\bullet W\bullet \left(\frac{2}{3}L+2{L}_{\text{OV}}\right)}$, showing that smaller ${L}_{\text{OV}}$ is a route towards a higher ${f}_{\text{T}}$.

With the gate and S/D defined by different lithographic steps, large overlap ($\sim 5 \mu m$) is unavoidable due to allowances for alignment tolerances. Our approach to reducing ${L}_{\text{OV}}$ is a self-alignment process [10], shown in Fig. 2d. In the lithography step for S/D patterning, the photoresist is exposed by UV light coming from the back of substrate, utilizing the transparency of ZnO and Al₂O₃. The gate metal works as a mask to block UV light on channel region. The location of S/D thus follows the location of the edges of the gate. This approach can reduce ${L}_{\text{OV}}$ to $\sim 0.5 \mu m$ and $L$ to $\sim 0.7 \mu m$ [11, 12], with the residual amount possibly due to effects such as light diffraction at pattern edges and chemical processes in the resist.

Aside from being used in current amplifiers, ZnO TFTs can work as active components in high-frequency oscillators to resonantly drive the radiative elements in a directional antenna [6]. In resonance, ZnO TFTs provide power gain to counteract power losses in the resonant tank. The Maximum Available Power Gain ($MAG$) is defined as the theoretically highest ratio of a TFT’s output power to a circuit, versus its input power. The frequency where $MAG=1$ is defined as the unity power gain frequency ${f}_{\text{MAX}}$. In order to optimize ${f}_{\text{MAX}}$, it’s necessary to first identify the sources of power loss within a TFT. Two examples are shown in Fig. 2e. One obvious source is current flowing through the gate resistance (${R}_{\text{G}}$) to charge and discharge the gate capacitor of the TFT in each AC cycle. Second, in the saturation region, the drain current ${I}_{\text{DS}}$ is ideally flat when ${V}_{\text{DS}}$ increases. However, in reality ${I}_{\text{DS}}$ slopes upwards in short channel TFTs ($L\le 2 \mu m$), with output resistance ${r}_{\text{o}}$ defined as ${\left(\frac{\partial {I}_{\text{DS}}}{\partial {V}_{\text{DS}}}\right)}^{-1}$ (the inverse of the slope) being non-infinite. Rigorous circuit analysis (beyond this paper) shows that finite ${r}_{\text{o}}$ leads to a reduction in output power and thus limits ${f}_{\text{MAX}}$ (${f}_{\text{MAX}}=\frac{{f}_{\text{T}}}{2\sqrt{{R}_{\text{G}}\bullet \left(2\pi {f}_{\text{T}}\bullet {C}_{OV,GD}+1/{r}_{\text{o}}\right)}}$) [12, 13]. Since ${r}_{\text{o}}$ is an intrinsic device parameter and is generally difficult to tune, we primarily improve ${f}_{\text{MAX}}$ through the reduction of ${R}_{\text{G}}$. To reduce ${R}_{\text{G}}$, we: (i) use a thick composite metal stack (10 nm Cr/110 nm Al/40 nm Cr, sheet resistance $=0.4\Omega /sq$) as the gate electrode; and (ii) employ a multi-finger device layout (divide the total width of TFT into multiple fingers to reduce the resistance along the gate width direction, shown in Fig. 2f).

As shown in Fig. 3a, ${f}_{\text{T}}$ and ${f}_{\text{MAX}}$ are measured to be 670 MHz and 1.9 GHz at ${V}_{\text{GS}}={V}_{\text{DS}}=6 V$, after these material and device optimizations. A higher achievable ${f}_{\text{MAX}}$, as compared to ${f}_{\text{T}}$, motivates ${f}_{\text{MAX}}$-limited circuit architectures for LAE systems.

Fig. 3

a Measured small-signal current gain ($\left|{H}_{21}\right|$) and Maximum Available Power Gain ($MAG$) of ZnO TFT ($W/L=50 \mu m/1 \mu m$) biased at ${V}_{\text{GS}}={V}_{\text{DS}}=6 V$. b Measured breakdown current ${I}_{DS,BREAK}$ vs. ${V}_{\text{DS}}$ and breakdown power ${P}_{BREAK}$ vs. ${V}_{\text{DS}}$. c Measured breakdown gate-to-source voltage ${V}_{GS,BREAK}$ vs. ${V}_{\text{DS}}$. d Schematic of difference in biasing points for active devices and passive devices

Demonstration of multi-element directional antenna based on ZnO TFTs used as active devices

With ZnO TFTs working as active devices, we demonstrated an LAE-based oscillator operating at 1.1 GHz [11], which is the first LAE-based giga-Hertz circuit to the best of our knowledge. The giga-Hertz operation frequency is enabled by a circuit structure limited by a TFT’s ${f}_{\text{MAX}}$ (instead of ${f}_{\text{T}}$, which is only $\sim$ 600 MHz) due to the “LC” resonant operation with an inductor [14]. With these giga-Hertz oscillators working as distributed RF sources, each driving one radiative antenna element (as in Fig. 1a), we have demonstrated an LAE-based phased array with beamforming capability at 1 GHz [6]. This shows a path towards monolithic phased arrays in the GHz regime for wireless systems with high spatial control. [Note: Our experimental phased array measured $\sim 0.4 m$ from end to end. The TFTs were fabricated monolithically, but unlike industry, our lab is not capable of processing meter-scale substrates. For the system demonstration the individual antenna-drivers were bonded to a meter-scale circuit board.]

Power limitation on ${{\varvec{f}}}_{{\varvec{T}}}$ and ${{\varvec{f}}}_{{\varvec{M}}{\varvec{A}}{\varvec{X}}}$

Based on the discussion regarding ${f}_{\text{T}}$ and ${f}_{\text{MAX}}$, a higher ${g}_{m}$ will boost ${f}_{\text{T}}$ and ${f}_{\text{MAX}}$, which can be achieved by biasing TFTs with higher gate and drain voltages. However, raising voltage and current eventually leads to device failure. We investigated this experimentally at each ${V}_{\text{DS}}$ by raising ${V}_{\text{GS}}$ until failure occurred. Figure 3b shows the drain-to-source current at breakdown ${I}_{DS,BREAK}$ and the breakdown power ${P}_{BREAK}={V}_{\text{DS}}\bullet {I}_{DS,BREAK}$ versus ${V}_{\text{DS}}$. At ${V}_{\text{DS}}=3 V$, ${V}_{\text{GS}}$ of $\sim 22 V$ was reached before breakdown, but at ${V}_{\text{DS}}=16 V$, device failure occurred at ${V}_{\text{GS}}$ of only $\sim 9 V$. However, the device power (and thus the average device temperature) at breakdown was roughly constant for all ${V}_{\text{DS}}$ values. This suggests thermally induced breakdown [5], the physical origin of which is currently under investigation. We note that LAE substrates (such as glass and plastic) generally have thermal conductivities orders of magnitude lower than silicon, making LAE devices susceptible to hot spots.

On the practical side, this power limit sets an upper bound to operation in the saturation region (where ${V}_{\text{DS}}$ and ${I}_{\text{DS}}$ are high): the maximum gate voltage possible before breakdown is $\sim 9 V$. This limit motivates applications where TFTs are used in the linear region (low ${V}_{\text{DS}}$, shown in Fig. 3d), instead of the saturation region, since in the linear region the current through the TFT and thus the power dissipation are much lower. In this case, ZnO TFTs work as passive devices. They no longer provide current/power gain as active devices do. In the following section, we introduce an architecture that uses the TFT as a simple tunable switch (ON or OFF) to construct a directional antenna at GHz frequencies.

ZnO TFTs used as “passive” devices

As opposed to multiple separate antennas used to generate a radio-frequency (RF) beam with tunable direction (as in Fig. 1a), a controllable beam directionality can also be created by a single antenna with multiple selectable current paths across antenna aperture. Setting the current paths controls the radiative elements and thus the beam direction [15]. We constructed such an antenna where an array of 208 TFTs was used to control current paths over an area of 9 cm $\times$ 9 cm [5]. The power was supplied by a single external RF generator and the TFTs functioned as “passive” switches routing RF signals from drain to source, each turned on/off by its own DC gate voltage. A key device metric for these passive switches is the off-to-on impedance ratio $\left|{Z}_{\text{OFF}}/{Z}_{\text{ON}}\right|$ between source and drain at RF frequencies.

Definition and optimization of $\left|{{\varvec{Z}}}_{{\varvec{O}}{\varvec{F}}{\varvec{F}}}/{{\varvec{Z}}}_{{\varvec{O}}{\varvec{N}}}\right|$

As shown in Fig. 4a, when the switch is off (${V}_{\text{GS}}<{V}_{\text{T}}$), the off-state impedance ($\left|{Z}_{\text{OFF}}\right|$) is dominated by the impedance of overlap capacitance (${C}_{OV,GS}$ and ${C}_{OV,GD}$) in series, since the parasitic series resistance ${R}_{\text{G}}^{L}$, contributed by the highly conductive metal gate, is negligible. When the switch is on (${V}_{\text{GS}}>{V}_{\text{T}}$), the on-state impedance ($\left|{Z}_{\text{ON}}\right|$) is dominated by the channel resistance ${R}_{CH}$. It is clear that we can improve $\left|{Z}_{\text{OFF}}/{Z}_{\text{ON}}\right|$ by both reducing $\left|{Z}_{\text{ON}}\right|$ and increasing $\left|{Z}_{\text{OFF}}\right|$. The corresponding device design approaches are summarized as follows [5].

Fig. 4

a Schematic of ZnO TFT used as passive switch and device models for switch at OFF state (${V}_{\text{GS}}<{V}_{\text{T}}$) and ON state (${V}_{\text{GS}}>{V}_{\text{T}}$). b Microscopy image of resonant RF switch, with zoom-in on the ZnO TFT. c Measured impedance of resonant RF switch at ON state (${V}_{\text{GS}}=20 V$) and OFF state (${V}_{\text{GS}}=0 V$)

To reduce $\left|{Z}_{\text{ON}}\right|$, we bias the switches with high ${V}_{\text{GS}}$ and low ${V}_{\text{DS}}$ to lower ${R}_{CH}$, since ${R}_{CH}=\frac{{V}_{\text{DS}}}{{I}_{\text{DS}}}\approx \frac{1}{{\mu }_{n}\bullet {C}_{OX}^{^{\prime}}\bullet \frac{W}{L}\bullet \left({V}_{\text{GS}}-{V}_{\text{T}}\right)}$. The device power consumption can be calculated as $P={V}_{\text{DS}}\bullet {I}_{\text{DS}}\approx {\mu }_{n}{C}_{OX}^{^{\prime}}\frac{W}{L}\left({V}_{\text{GS}}-{V}_{\text{T}}\right)\bullet {{V}_{\text{DS}}}^{2}$, and therefore the small ${V}_{\text{DS}}$ value guarantees the margin for safe operation, below the thermally induced breakdown limit.

We use the same TFT device structure as in the earlier oscillator example. In this case, reducing the overlap capacitance through self-alignment increases $\left|{Z}_{\text{OFF}}\right|$, and the thick composite gate electrode reduces parasitic resistance. We also employ an LAE-compatible, high quality-factor, inductor in parallel with ZnO TFT to resonate out the overlap capacitance.

Figure 4b shows the microscopy image of the demonstrated resonant RF switch, consisting of a ZnO TFT and a loop inductor in parallel. A $\sim 20 k\Omega$ resistor made of a thermally deposited Cr layer is added at the gate of the TFT, to isolate the switch from the DC biasing line and to protect the switch from electrostatic discharge. In this configuration the device power is low. Then, to lower $\left|{Z}_{\text{ON}}\right|$ for raising $\left|{Z}_{\text{OFF}}/{Z}_{\text{ON}}\right|$, we can operate safely (without breakdown) at ${V}_{\text{GS}}$ up to at least 20 $V$ (vs. a maximum of $\sim 9 V$ in the saturation case). The measured switch impedances in the ON and OFF states are shown in Fig. 3(c), with an off-to-on impedance ratio over 22 within a bandwidth of 400 MHz (2.2 GHz to 2.6 GHz), and a peak off-to-on impedance ratio of 48.

Demonstration of multi-element directional antenna based on ZnO TFTs used as passive devices

With ZnO TFTs working as passive devices, we demonstrated a reconfigurable antenna operating in the 2.4 GHz Wi-Fi band [5]. The resonant RF switches reconfigure the current distribution over the antenna surface. By varying switch configurations this antenna system can tune its resonant frequency and the radiation pattern.

Conclusions

To fully realize the potential of for applications in IoT and 5G/6G, the operation frequency of LAE devices and systems has been raised to giga-Hertz. This requires co-design of materials, device structure, fabrication processes, and circuit architecture. The TFT’s unity current gain frequency ${f}_{\text{T}}$ of 670 MHz and unity power gain frequency ${f}_{\text{MAX}}$ of 1.9 GHz were demonstrated. $\left|{Z}_{\text{OFF}}/{Z}_{\text{ON}}\right|$ reached 48 in the 2.4 GHz Wi-Fi band. Thermal considerations affect the device operating limits and thus the possible choice of circuit architecture. In summary, giga-Hertz LAE opens new opportunities for wireless applications, as it enables monolithic integration over meter-scale, flexible radiative apertures. This makes Large-Area Electronics a promising candidate for IoT and 5G/6G systems.