Introduction

Artificial Neural Networks have emerged as the method of choice for processing large data sets. Such architectures can be made tolerant to variations in the synaptic weight values. In Deep Neural Networks (DNNs), the “Multiply and Accumulate” operations performed at each layer can be executed in the analog domain, using Ohm’s and Kirchhoff’s laws, by a voltage drop through a crossbar array of trimmable, resistive memories (or memristors [1]) representing the synaptic weights. In ferroelectric memristors, the conductance is reversibly modified by switching the polarization of a fraction of ferroelectric domains [2]. The ferroelectric switching is a purely electronic event, with potentially infinite endurance (> 1014 cycles [3]), and occurs only above a certain threshold, conferring excellent stability and retention properties to ferroelectric synaptic weights [4]. Spiking Neural Networks (SNNs), inspired by the human brain, consist of a network of non-linear synapses and neurons. The input is encoded in trains of spikes, and the plasticity of the synapses confers to the network the ability to learn in an unsupervised way. Ferroelectric components are intrinsically good candidates for the hardware realization of such networks [5]. The ferroelectric domains only switch above a certain threshold, making ferroelectric synapses compatible with bio-inspired schemes such as Spike-Timing-Dependent-Plasticity (STDP) [6] or paired pulse facilitation/depression [7].

BiFeO3 (BFO) is a multiferroic material with attractive properties for resistive switching devices. Boyn et al. demonstrated STDP in BFO based synapses, revealing their potential for unsupervised learning in SNNs [8]. In this work, we explore its integration in neuromorphic circuits. In the literature, most demonstrators are capacitors deposited by shadow masking or lift-off techniques, sharing a plain bottom electrode. For characterization, they are electrically contacted by a needle or a conductive, atomic force microscope. To evaluate the potential of BFO synapses in neuromorphic chips, the nanofabrication of multiple isolated synapses interconnected with two metal lines is required.

In the first part of this work, we report on the fabrication and the characterization of passive crossbar arrays on a YAlO3 single crystal substrate. First, a metal with a large work function (Ni) is investigated, in the quest of maximizing the On/Off ratio [9] (the ratio between the currents in the Low and High Resistive States (LRS, HRS)). The resistive switching observed in the fully processed chip differs from that observed in the simplified test structures on the blanket film, the On/Off ratio is orders of magnitude smaller. In the second part of this work, we investigate the origin of this difference by performing area and temperature dependent measurements. Then we report on the programming operation of BFO synaptic weights in passive crossbar arrays. We compare crossbars based on epitaxial BFO and polycrystalline HfZrO4 (HZO). We quantify the cross-talk for both technologies and discuss the use of half-programming voltage schemes. Based on the findings discussed in this work, we present an improved integration scheme for passive crossbar arrays with (784 × 100) synapses.

Materials and methods

Nanofabrication of passive crossbar arrays

In this section, the fabrication of functional passive crossbar arrays is presented. The material system consists of a 4 nm thick ferroelectric layer (BiFeO3—BFO) and a 17 nm thick oxide electrode (Ca0.96Ce0.04MnO3—CCMO) grown on 1 × 1 cm2 single crystal substrates of YAlO3 by pulsed laser deposition. The details of the growth process can be found in [10]. Earlier work compared the characteristics of BFO/CCMO test structures with various metal contacts [9], where Ni exhibited the highest On/Off ratio (104). In this work, we first explore the use of this material for the contacts both for the top and the bottom electrode. To our knowledge, process flows for the fabrication of passive crossbar arrays of BFO synapses epitaxially grown on single crystal perovskite oxide substrates, have not yet been developed.

In contrast, only a few years after the discovery of ferroelectricity in hafnia, small-scale demonstrators [11] were already fabricated on SiO2-coated silicon wafers. For both systems, the process-flow is such that the bit lines and word lines are achieved on the highest levels of the layer stack (hereafter referred to as “M1” and “M2” metal levels). Although this increases the footprint of the devices, it has two advantages: first, the device-to-device variability is strongly reduced when the functional layers are deposited on an unpatterned surface. Second, the CCMO back electrode has a low conductivity compared to metals and is hence not suited to serve as an array access line. With this design, the length of the CCMO conductive path is minimized.

To demonstrate the fabrication of crossbars based on FTJ devices with sub-micrometer size, an e-beam lithography process was established. The non-conducting and transparent properties of the YAlO3 substrate require extra precaution. The original approach reported in this process-flow consists of using a sacrificial water soluble polymer, coated on-top of the e-beam resist. Then, chromium is deposited by sputtering to avoid any charging effect during the e-beam exposure of the resist. After the exposure, the metal is lifted off by dissolving the polymer in water. The detailed process flow for the BFO FTJ devices with Ni contacts is as follows:

Using this approach, e-beam lithography is applied to open the back contact to the device by locally etching the BFO layer [ion milling tool with an Ar plasma and a beam current of 250 mA, Fig. 1(a).Then using the same patterned resist, a Ni lift-off is performed [Fig. 1(b)]. Simultaneously, e-beam markers are deposited. Next, the top contact (Ni) is realized by a lift-off process on the BFO to form the ferroelectric tunnel junction as represented in Fig. 1(c). Figure 1(d) then shows the result of the device isolation step, necessary to electrically disconnect all devices from each other. A 100 nm thick SiO2 passivation (with 5 nm Al2O3 as etch stop) is added on top by plasma enhanced chemical vapor deposition (PECVD) at 300 °C, vias to the device contacts are dry etched by reactive ion etching (RIE) in a CHF3 plasma [Fig. 1(e)]. Then, tungsten (100 nm thick) metal line and pads (M1) are formed on top of the passivation [Fig. 1(f)]. At this stage, a single test device can be measured. An additional passivation layer (Al2O3 (5 nm)/SiO2 (300 nm), [Fig. 1(g)]) and metal layer (M2) is then patterned. The final cross section is depicted in Fig. 1(h).

Figure 1 
figure 1

Process-flow: (a) BFO is etched by ion milling to access the CCMO back electrode. (b) Using the same e-beam resist from (a), Ni contacts to the CCMO are realized by lift-off. (c) Using a lift-off process, Ni contacts are placed above BFO to form a FTJ device (Ni/BFO/CCMO). (d) Each device is isolated from each other by a surrounding trench that is etched by ion milling. (e) A thin passivation [Al2O3 (5 nm)/SiO2 (100 nm)] is deposited to isolate M1 from the BFO. Vias to the device contacts are etched and (f) M1 is deposited by sputtering and patterned by RIE. (g) A second passivation [Al2O3 (5 nm)/SiO2 (300 nm)] is deposited to isolate M2 from M1. Vias to M1 are etched. (h) M2 is deposited by sputtering, then patterned by RIE.

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Impact of metal contact processing on the ferroelectric resistive switching

In addition to the crossbar arrays, single devices with access pads at the first and second metal levels (M1 and M2) were fabricated for device characterization. Resistance hysteresis measurements were taken from a test FTJ with a diameter of 1 µm after processing up to M1 and after processing up to M2. In this experiment, voltage pulses of varying amplitude are applied to the top electrode of the FTJ while the CCMO electrode is grounded. First, a write signal with an amplitude “Vwrite” is applied during 10 ms on the top electrode. Second, the resistance of the junction “R0.2 V” is read by applying a I–V sweep from − 0.2 V to 0.2 V. Then the write amplitude is increased or decreased, and the same procedure is repeated until a full resistance hysteresis loop is complete. Starting from 0 V, the write amplitude is increased towards positive values to switch the device into the Low Resistive State (LRS). From the maximum positive value, the write amplitude is then decreased towards the maximum negative value to switch the device into the HRS. This polarity is opposite to that observed by Boyn et al. on unpatterned BFO/CCMO films [9]. Five hysteresis cycles are represented, the direction is indicated by the black arrow. At the M1 stage [blue curve in Fig. 2], the low resistive state has a resistance of ROn = 275 kΩ and the On/Off ratio was 152. After finishing the full process up to M2, the low resistive state has increased more than an order of magnitude to ROn ~ 10 MΩ [red curve in Fig. 2] and the On/Off ratio decreased to 6. To understand the origin of the inverted polarity and of the change in the On/Off ratio, we investigate the resistive switching mechanisms in the aged system.

Figure 2
figure 2

Left axis: Resistance at 0.2 V for FTJs with diameters of 200 nm, 300 nm, 500 nm, 1 µm, 2 µm and 5 µm. Right axis: corresponding On/Off ratio. Write pulses with a rise time (tr) of 2 µs and a pulse duration (tw) of 50 µs were applied.

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Results

Resistive switching in the BFO/CCMO system

Area dependent measurements

Several works point to the major role of oxygen vacancies in the resistive switching mechanisms in BFO. Their migration can induce a transition from a Schottky emission limited conduction mechanism to direct tunneling [12] or to an Ohmic contact [13]. In Ca-doped BFO, it induces a transition from an insulating state to a p–n junction [14]. In BFO/Nb:SrTiO3, the migration of oxygen vacancies together with charge trapping and detrapping processes results in a modulation of the barrier height and width of the depletion region at this interface [15]. In these films, Space-Charge-Limited-Conduction (SCLC) is observed as the dominant mechanism. Similarly, in Au/BFO/Pt capacitors, the electric field induces carrier trapping and detrapping at the Au/BFO interface, changing the depletion layer thickness [16].

In some cases, the resistive switching even occurs at electric fields smaller than the ferroelectric coercive field: a transition from the Poole–Frenkel to the Ohmic conduction was identified and interpreted as the formation of a filament [17]. In Mn-doped BFO thin films, Luo et al. observed SCLC limited conduction: the ionized oxygen vacancies, acting as electron trapping centers, can attract electrons to fulfill local charge neutrality and reduce the Fe3+ into Fe2+, forming a conductive path [18]. Conductive filaments were also observed in La-doped BFO [19]. Wang et al. observed a change from the SCLC model to the conductive filament [20] in Pt/BiFeO3/SrRuO3/SrTiO3 resistive cells.

To investigate the possible presence of conductive filaments in our structures, devices with various areas are measured (diameters of 200 nm, 300 nm, 500 nm, 1 µm, 2 µm and 5 µm). In filamentary resistive cells, the device conductance before forming is typically linearly dependent with the area, while it is independent of the device dimension after forming a filament. As seen in Fig. 3, this trend is not observed here: we rule out the existence of a conductive filament in the FTJs.

Figure 3
figure 3

Resistance of a FTJ (diameter 1 μm) measured at Vread = 0.2 V after applying pulses of amplitude Vwrite. Blue curve: after defining the 1st metal level. Red curve: after defining the 2sd metal level. For each measurement, five repetitions are represented. The arrow indicates the direction of the hysteresis.

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In FTJs instead, the device resistance should scale with the junction area. This trend is also not observed here: the conductance in the pristine, HRS and LRS increases linearly with the inverse of the radius, which could indicate that the leakage is higher at the edges of the device. During the isolation of the devices by ion milling, the edges of the BFO area can become conductive because of defects. To avoid leakage through the edges of the BFO, the mask is carefully designed for the metal contact to be several tenths of nanometer away from the BFO edges. The observed trend may be due to partial switching of the polarization at the edges (increased electric field), consistently with the relatively small On/Off ratio. A large variety of conduction and switching mechanisms is reported in literature. In FTJs with asymmetric electrodes, the reversal of the ferroelectric polarization modifies the energy barrier seen by the electrons [21]. In Pt/BFO/SrRuO3 switchable diodes [22], BFO is described as a n-type semiconductor: upon ferroelectric switching, the contact with the electrodes switches from Ohmic to Schottky. In “super-tetragonal” BFO, the large ferroelectric polarization leads to record tunneling electro-resistance [10]. Another manganite studied in combination with BFO is La0.6Sr0.4MnO3 (LSMO). Huang et al. proposed that when the polarization points towards the BFO/LSMO interface, the electrostatic accumulation of holes improves the Mn3+–O2–Mn4+ ferromagnetic double exchange [23], leading to a thinner BFO/LSMO interfacial layer. (NB: in this paper, 4 V operation is achieved in ~ 5 nm BFO). In the BFO/CCMO system, the ferroelectric field-effect electrostatically modulates the carrier concentration and consequently the CCMO resistivity[24].In a recent work, Yu et al. further investigate the resistive switching mechanisms and demonstrate the transition from SCLC in the HRS to Schottky emission in the LRS [25].

The polarity of the switching can provide useful insights on the resistive switching mechanisms. CCMO is n-type (with a carrier density of typically around 1.55 × 1021 cm−3) [26]. In metal/ferroelectric/n-type semiconducting tunnel junctions, the screening of the polarization charges in the semiconductor creates an accumulation (resp. depletion) of electrons when the polarization points towards (resp. outwards) the semiconductor. This should lead to a Low Resistive State (LRS), (resp. to a High Resistive State (HRS)). This is indeed the polarity observed in Fig. 2, for both the fresh and the aged devices with Ni electrodes. Note that previous work however showed that in the Co/BFO/CCMO system, the HRS occurs when the polarization points towards the CCMO electrode [10]. The inverted polarity was explained by the presence of an interfacial dielectric layer at the Co/BFO interface [27, 28]. The On–Off ratio, in this case caused by the TER, not only depends on tunnelling barrier height modulation through incomplete screening [28] but also on the electrostatic potential across the ferroelectric by different metal work functions [9], and tunnelling barrier width modulation by enhanced depletion of one electrode or partial metallization of one of the interfaces to the ferroelectric [27].

Temperature dependent measurements

To further understand the origin of the moderate On/Off ratio in the aged devices, we determine the temperature dependent current voltage characteristics. The device diameter is 1 μm. The non-switching curves (positive and decreasing voltage, negative and increasing voltage) are represented in Fig. 4(a). Three regimes are observed. In the low and intermediate voltage range, the conduction is thermally activated. In contrast, at higher bias, an abrupt transition towards a conduction mechanism independent on the temperature is observed.

Figure 4
figure 4

(a) LogJ − LogV plots on the non-switching branches for temperatures in the range 308–328 K. In region (I) the Ohmic regime is observed. In region (II) the EDT-SCLC is observed. (b) Arrhenius plot of the intercepts of the linear regressions in the Ohmic regime in (a).

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In the low and intermediate bias region, both bulk and electrode limited conduction mechanisms were considered. The experimental data is well described by the SCLC mechanism. At low voltages (V < 70 mV) J varies linearly with V (Ohmic conduction). The Ohmic current varies as: \(\mathrm{log}\left(J\right)=a+b\times \frac{1}{T}+\mathrm{log}(V)\) with \(a=\mathrm{log}\left(\frac{\mu q{N}_{v}}{d}\right)\) and \(b=-\frac{{E}_{F}-{E}_{v}}{{k}_{B}}\) where µ is the hole mobility, q the electronic charge, kB the Boltzmann constant and T the absolute temperature. EF − Ev is the energy difference between the valence band and the Fermi level and Nv the effective valence band density of states. In a first approximation, the electric field E was assumed to drop mainly across the ferroelectric layer i.e. d is taken equal to the BFO thickness: 4.1 nm. The quantities (a + b/T) were measured for each temperature from the linear regressions in Fig. 4(a). Then a and b were extracted from the Arrhenius representation in Fig. 4(b). The position of the Fermi level is then estimated to be at 0.43 eV above the valence band of BFO in the LRS, and decreases to 0.38 eV in the HRS, indicating that the barrier height change is not the dominant mechanism for the resistive switching. The carrier concentration—mobility product is estimated to µNv+  = 5 × 1022 m−3 in LRS; it increases to µNv− = 3 × 1021 m−3 in the HRS, consistently with the larger resistance observed.

In the intermediate bias region (− 1.4 V < V < − 0.5 V and 1 V < V < 1.6 V), a power law dependence J α Vm+1 is observed. For the non-switching branches (positive and decreasing voltage, negative and increasing voltage) the parameter m is > 1 and varies linearly 1/T, which suggests a SCLC current governed by traps which are exponentially distributed in energy [29]. In the Mark and Helfrich model [30], the proportionality coefficient TC is proportional to the energy Et = TC/kB characterizing the decay of the exponential tail in the Density Of States. As for the Ohmic conduction regime, the conduction in the trap-filling SCLC regime is bulk-limited, contrasting with the interface-limited conduction observed in nanocapacitors on blanket films [10].

Discussion

Effect of aging on the On/Off ratio

Based on the results presented above, the proposed mechanism for the resistive switching is as follows: the Ni contacts oxidize at the surface of the BFO, forming a NiOx layer and preventing the direct tunneling of electrons across the BFO. The conduction is limited by space charge regions at the BFO/CCMO and at the Ni/BFO (also described as Ni/NiOx/BFO) interfaces. After a positive bias is applied, the polarization points toward the CCMO layer. It is an n-type semi-conductor, thus in this configuration electrons (carriers) accumulate in the CCMO layer, resulting in an BFO/CCMO interface with a small resistance. At the Ni/BFO interface, electrons deplete in the NiOx layer, resulting in an interface with a large resistance. As the ferroelectric polarization is reversed, the resistance of the BFO/CCMO interface increases while that of the Ni/BFO interface decreases. The two effects cancel each other, leading to a small On/Off ratio.

Earlier, we mentioned that in the Co/BFO/CCMO (plain film) system [10], the interfacial CoOx resulted in an inverted polarity compared to the Ni/BFO/CCMO/Ni system. This can be explained as follows: not only an interfacial oxide may form at the Ni/BFO interface, but also at the CCMO/Ni interfaces. Oxygen from the CCMO is thereby scavenged, which increases the resistance of the CCMO. CCMO is metallic when about 4% of the Ca2+ ions are substituted by the smaller Ce4+ ions. This yields a two-electron doping for the parent material (CaMnO3), donating two electrons to the conduction band of CaMnO3 and thereby creating mixed valent Mn3+/4+ ions [31]. Removing oxygen from the compound reduces Mn, which leads to an insulating layer [32]. Such oxidation can be induced by the high processing temperatures (300 °C) of the passivation deposition (SiO2, PECVD), and occur over time at room temperature. Because of oxygen scavenging by the Ni bottom electrode contact, the patterned CCMO layer has a smaller carrier density compared to the CCMO plain film. Therefore, the depletion length is large and the BFO/CCMO interface controls the FTJ polarity.

Half-programming schemes in passive crossbars

In the introduction, we mentioned two applications for the ferroelectric crossbars: deep and spiking neural networks. In passive crossbars for DNNs, a sequential programming scheme consists in applying half of the programming voltage to the unselected word and bit lines [33]. In this scheme, the devices sharing a line with the selected cell see a potential of Vwrite/2. Half-programming is also important for SNNs: In the scheme proposed by Lecerf et al. [34] or in the scheme used by Max et al. for hafnia/dielectric double-layers [35] and Wei et al. in epitaxial HZO [36], the spikes are composed of a positive signal followed or preceded by a negative signal. For a single spike, the amplitudes of the negative and positive signals are too low to trigger a ferroelectric domains switching event. For a pair of spikes (pre- and post- synaptic) with the optimal time delay, the amplitudes sum up and the field is large enough to switch a fraction of the domains. Therefore, in SNNs as well it is crucial to define a maximal programming amplitude Vwrite such that devices which sees a potential of Vwrite/2 do not switch.

Crossbar arrays based BFO as well as CMOS compatible, polycrystalline, ferroelectric hafnium zirconium oxide (HZO) were fabricated. The HZO thin film chosen for the comparison with BFO is also 4 nm thick. It is also interfaced with a metal on the top electrode (here TiN) and a metal oxide as the bottom electrode (WOx). The dimensions of the devices are chosen such that the Off states are both in the 10 MΩ range. For such TiN/HZO (4 nm)/WOx/TiN system, the On/Off ratio is < 10, comparable to the BFO with Ni contacts. The details for the fabrication of the hafnia crossbar can be found in Ref. [11].

Figure 5 represents hysteresis electro-resistance loops for BFO (a) and HZO (b) central devices of a 3 × 3 crossbar array. The measured On/Off ratio are comparable (3.5 & 2.6). Note that the polarities are different: in the BFO/CCMO system, the high resistive state is obtained when the polarization points outwards the CCMO layer, i.e. when electrons are depleted in the later. In the HZO/WOx system, although WOx is also a n-type semiconductor, the ferroelectric field-effect in WOx is not the dominant mechanism. Instead, the reversal of the polarization leads a redistribution of the defects in the HZO layer itself [11, 37].

Figure 5
figure 5

Hysteresis resistance loops for BFO (a) and HZO (b) central devices in a 3 × 3 crossbar array.

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For the BFO, we see in Fig. 5(a) that: assuming that the LRS is reached for 7 V, a device which is in the HRS and feels a bias of 3.5 V will switch by 32% of his dynamic range. Because of the offset in the hysteresis resistance loop, the situation is worst for negative bias, with 52% switched at − 1.5 V. The disturb is worst in the HZO films [Fig. 5(b)]: 62% of the dynamic range is traversed at 1 V (half of the voltage required to switch to the HRS) and up to 87% at − 0.6 V (half of the voltage required to switch to the LRS). The crosstalk is further characterized in the next section.

Cross-talk

Programming and read operation were performed in a 3 × 3 crossbar array In the following experiment, the synaptic weights, wij with i, j in [0; 1; 2], were sequentially measured [Fig. 6(a)]. After a 10 ms long pulse of amplitude VBFO, the programmed state was probed by measuring the resistance at R at 200 mV. All the devices exhibit comparable ROFF, while RON varies from one device to another. Nine out of the nine devices of the 3 × 3 crossbar array show functional resistive switching.

Figure 6
figure 6

(a) Electro-resistance loops for nine FTJs in a 3 × 3 crossbar, numbered, ‘i, j’ with i, j in [0; 1; 2]. Consecutively: ‘00’, ‘10’, ‘20’, ‘21’, ‘11’, ‘01’, ‘02’, ‘12’, ‘22’. (b) R-V read sweeps before (-pre) and after (-post) applying 4 V to the element [1 1]: for this moderate programming voltage, the effect of sneak paths (c) is weak: as reported in the table in (d), neighboring elements have switched by dRi,j = 2–5% of the dynamic range measured in (a), and corner elements by 0–2%. (e) In contrast, for a programming voltage of 5 V to the central element [11], neighboring elements have switched by 13–22% of the dynamic range, and corner elements by 4–6%.

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The synaptic weights, wij with i, j in [0; 1; 2], were first all sequentially set using − 4 V. The chronological order was: ‘00’, ‘10’, ‘20’, ‘21’, ‘11’, ‘01’, ‘02’, ‘12’, ‘22’. The resistance at 200 mV, \({R}_{i,j}^{pre}\), was measured by a sweep from − to + 200 mV (dark color curves in [Fig. 6(b)]). Then, a DC ramp from 1 to 4 V was applied to the central element of the array [1 1]. The resistances of the devices at 200 mV, \({R}_{i,j}^{post}\), were measured by a voltage sweep (light color curves in [Fig. 6(b)]). During the sequential programming of the devices, the current can flow through sneak paths, as in the example sketched in Fig. 6(c) (dashed line), causing undesired programming of the other weights.

For each wij, \({R}_{i,j}^{ON}\) (resp. \({R}_{i,j}^{OFF}\)) is defined as the minimum (resp. maximum) resistance reached after applying 7 V (resp. − 4 V), and measured from the data reported in Fig. 6(a). The relative change in resistance is then calculated as \({dR}_{i,j}=({R}_{i,j}^{post}-{R}_{i,j}^{pre})/({R}_{i,j}^{ON}-{R}_{i,j}^{OFF})\). It is reported in the table in Fig. 6(d): the moderate programming voltage of 4 V causes the central weight ‘11’ to switch only by 26% of the dynamic range. During the programming of ‘11’, the weights ‘12’, ‘01’, ‘21’ and ‘10’ partially switch, by 2 to 5% of the dynamic range. The central weight ‘11’ can be fully switched with a programming voltage of 5 V. However, as reported in Fig. 6(e), the neighboring weights will further switch by up to 22% of the dynamic range. For comparison, for the HZO technology, a neighboring weight switches by 70–85% of the dynamic range when a weight is fully switched. As discussed through Fig. 5, the distribution of coercive fields in polycrystalline hafnia result in a small threshold voltage compared to the voltage required for switching the full film: as a result the effect of the sneak paths is stronger than in the epitaxial BFO films.

Improved crossbar array for interconnection with neuromorphic circuits

As seen above, the ferroelectric synaptic weights based on BFO thin films are good candidates for the hardware realization of artificial neural networks. The design of the M1 and M2 metal lines is further optimized for the interconnection of a 784*100 crossbar array to a neuromorphic circuit using an advanced assembly technique, the controlled collapse chip connection or flip-chip bonding. This method requires to position 884 pads of 60 um in diameter on the YAO chip, separated by a regular pitch of 125 um. A custom positioning maximizes the metal line width [Fig. 7(a)]. As the available area is limited [Fig. 7(b)], the two metal levels M1 (red) and M2 (grey) are used [Fig. 7(c)]. In such array with a large aspect ratio, the column width is designed larger than the row width (15 um vs 4 um).

Figure 7
figure 7

Flip-chip bonding electrode design: (a) Arrangement of pads and routing with maximal line width. (b) Overview of the M1 and M2 routes from the array to the pads. (c) Connection between the routes and the row lines. The red layer is M1, the gray layer is M2 and the diagonally striped layer holds the vias between M1 and M2.

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Based on the findings related to the use of Ni as metal contacts in crossbar arrays, an improved process-flow is developed, in which Ni top electrode is replaced by sputtered W. The CCMO back electrode is contacted by Pt. In addition, 200 nm of Al is deposited by lift-off on top of the 100 nm W constituting the M1 and M2 metal lines. With this method, the total resistance of a line (resp. of a column) reaches 82 Ohms (resp. 60 Ohms). The FTJs have a diameter of 500 nm. At the end of the process, no aging was observed. Electro-resistance loops were performed by addressing devices in the crossbar. As seen in Fig. 8 for two devices randomly chosen, the device-to-device variation exceeds one decade, but the resistive switching is reproducible from a cycle to another. The devices are in the LRS after applying a negative voltage to the top electrode: the W/BFO interface is now dominant over the BFO/CCMO interface. Following the discussion above, this indicates that the Pt contact to the CCMO does not scavenge anymore oxygen from the later. The On/Off ratio measured in the 784*100 crossbar with W and Pt contacts is two orders of magnitude larger than the On/Off ratio reported in Fig. 5 for the fully processed HZO and BFO with Ni electrodes 3 × 3 crossbars.

Figure 8
figure 8

Successive electro-resistance loops for two synaptic weights with coordinates (i, j) = (44, 10) (green curves) and (j, j) = (18, 89) (red curves) in the 784 × 100 crossbar array with W and Pt contacts.

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Conclusion

A process for the fabrication of crossbar arrays of ferroelectric synapses on single crystals was developed. The use of Ni contacts motivated by the large On/Off ratio reported on Ni/BFO/CCMO//YAlO3 capacitors, lead to a degradation of the latter in the fully processed devices. The origin of the degradation was investigated, in particular using temperature dependent measurements. The oxidation of the Ni contacts at the BFO and the CCMO interfaces is responsible for a change in the device polarity. It blocks tunneling currents through BFO at small bias, and changes the conduction from interface (tunneling) to bulk (Ohmic, SCLC) limited. The crossbar processed with the Ni contacts had comparable On and Off resistances with polycrystalline hafnia-based crossbars, allowing for a one-to-one comparison of their functionalities. The relatively larger threshold in the BFO based synaptic weights favors half-programming schemes for supervised and unsupervised learning; it also allows for a limited effect of sneak paths. A larger crossbar with W and Pt contacts was further processed on a 1 × 1 cm2 single crystal, in view of its integration to neuromorphic circuits by flip-chip bonding. The original polarity was recovered and a large On/Off ratio of 50–100 was measured.