Fabrication of various electrical resistances producing Zn nanowires and subsequent oxidation fabricating ZnO nanowires in PAA template by periodic and pulsed electrochemical deposition

Abstract

Highly ordered anodic alumina template was produced by hard anodization. Barrier layer thickness was then reduced by a thinning process, and in the following Zn nanowires, it was grown in pores by periodic (AC) and pulsed electrochemical deposition. The samples were placed in a furnace for oxidation and for the possible preparation of electrical resistors. By measuring the electrical resistance of nanowire arrays, we did the calculations to find the electrical resistivity of each ZnO nanowire.

Background

A template of nanopores of porous anodic alumina (PAA) film is produce by aluminum anodization using acidic solutions and standard voltages. This structure can be engineered to form various shapes of pores [1].

In recent years, this structure has extensively developed in the industry, and some of its applications are magnetic memory [2] and manufactured electronic devices such as capacitors [3], biosensors [4], and template for synthesis of nanowires [5]. Filling the porous alumina template by various materials is one of the simple techniques that would produce a regular array of nanowires [5].

One method of filling the porous template is by electrochemical deposition [6]. This array of nanowires with almost a nonconducting alumina structure can be considered as a path for electron transition through a circuit, and freestanding wires can be used as electrical resistance. Measuring the electrical resistance of the template filled with nanowires makes it possible to use as a nanoresistor in microelectronic devices. Of course, in a very small scale, some physical laws cannot be established. For example, it is possible that electrical resistance would not follow the Ohm’s law.

In general, one can classify the conductance of tiny wires into three regions according to their sizes: (1) region that follows material laws similar to bulk mode; (2) region that should be considered by quantum effects, with its dimensions less than the mean free path of electron in the material, and in this case, the electrical resistance values are discrete because of restrictions on electronic wave functions [7]; and (3) region between these two cases in which wires that have dimensions of the mean free path order and dimensions of grain boundaries can be reduced by decreasing the wire diameter, and thus, electrical resistance can be increased faster than the Ohm’s law. Also, some equations are suggested to determine the electrical resistance in this region [7].

Of course, it can be said that for wires with diameters ≥100 nm, including all their materials, bulk laws are established. Here, we study using the mentioned range. First, we fabricate Zn nanowires in PAA template and then oxide it in a furnace. In the past decade, numerous studies have been made on both production and application of one-dimensional ZnO [8, 9], e.g., the luminance properties of ZnO that increase by fabricating its nanowires in anodic aluminum oxide template [10].

Here, we measure the electrical resistance of porous anodic alumina template filled with Zn nanowires before and after oxidation and examine the provided various electrical resistances with oxidation at different temperatures while trying to introduce a method for measuring the electrical resistance of a single nanowire.

Results and discussion

As one can see in Table 1, there is a significant difference between the resulting values at different temperatures, and therefore, different electrical resistances are produced by this method.

Table 1 Resulting average of twice measured electrical resistance of PAA deposited and filled by Zn nanowires

We also approximated calculations to find the electrical resistance of a single nanowire for one of the cases in Table 1 before any oxidation (18°C to 19°C) and after oxidation of the sample at 200°C. In total, the electrical resistance of the sample after oxidation was produced from the initial resistance of aluminum, resistance of alumina, and resistance of some oxidized nanowires located at the electrical connection. By deducing the resistance of the sample before oxidation (initial resistance of alumina), an approximate value for the resistance of array of parallel nanowires can be obtained.

The layer thickness under nanowires is about 15.6 nm. Thus, because the thickness is very thin, any change in the resistance of the alumina barrier layer due to annealing can be neglected. This assumption was also checked by another experiment, and in this work, we have measured the electrical resistance across the template filled with Ag nanowires produced by periodic electrodeposition. Thinning was continued until the voltage was reduced to 12 V, and electrodeposition was done at 18 V and 200 Hz, before and after oxidation at 300°C. The resulting values of resistances are 2.64 and 6.43 Ω m⁻², respectively. Because silver is a very good conductor (15.87 nΩ m in 20°C), we neglected its electrical resistance; also, its melting point is very high (961.78°C), but its oxidation after annealing (300°C for 17 h) is negligible. Thus, the resistance of the sample before oxidation is mainly due to the barrier layer resistance under the connected wires, and the resistance after oxidation is also due to the initial resistance of the barrier layer plus the added amount of resistance of this layer during oxidation and annealing.

By deducing the resistance values before and after oxidation, we can obtain the amount of increased resistance by annealing which is about 3.79 Ω m⁻². However, the resistance values in Table 1 are in megaohms, so this value is negligible for samples with such barrier layer thickness. Now, for ZnO nanowires with this approximation, we obtained the resistance of parallel array of the existing nanowires in the template to be 1.86 MΩ (difference between two values before and after oxidation).

Now, we calculated the number of pores per unit area using the hexagonal cells of the porous alumina structure (Figure 1). The hexagonal area is $\sqrt{3/2D_{\mathit{int}}^2}$, and the number density of pores per unit surface is $n=1/\sqrt{3/2D_{\mathit{int}}^2}$. Also, a relation was established between the interpore distance (D_int) and the anodized voltage (D_int = λi × U) with the proportionality constant λ_i = 2.5 nm/V [11]. In our experiment, the anodized voltage is 130 V, so D_int = 325 nm and n = 77.3 × 10⁷ pore/cm².

Figure 1

Two-dimensional honeycomb cell and its corresponding pore mouth of anodized alumina structure.

The surface area of gold in the sample is 1.16 cm² (area of mask), so the number of pores in this area is 89.66 × 10⁷. However, it is confirmed experimentally that about 5% to 10% of pores are completely filled up to the surface, and some wires can be connected to the gold layer because of the influence of gold particles into the pores. Thus, we could approximate the number of desired nanowires to 10% of the number of pores.

To find the electrical resistance of a single nanowire, we divided the amount of resistance of parallel nanowire arrays by 10% of the number of pores (89.66 × 10⁶). Hence, the amount of electrical resistance of a single nanowire with an approximate length of 45 μm (the final length of pores after thinning) is 0.020 Ω.

As we have mentioned, this value is obtained by some approximate calculation which show the range of a single nanowire resistance. Unfortunately, we did not find similar results in other articles in order to compare with these values. Although the oxidation of the nanowire is low, the existence of such resistance is shown, so by increasing the time and oxidation temperature, we could obtain a complete oxide nanowire (ZnO) as an electrical resistance. In the next step, we can release the nanowire from the template as a nanoresistance for nanoelectronic purposes.

Conclusions

In this research, we initially produced nanoporous alumina templates by anodizing the aluminum foil and used them to deposit and make nanowires. We did this process by pulsed and periodic electrochemical deposition.

For the deposition process, the barrier layer at the bottom of the pores was made thin, and we then deposited Zn in pores and produced Zn nanowires. The STM micrograph and X-ray diffraction (XRD) pattern show the existence of the produced nanowires.

The electrical connection was created by depositing a gold layer using joule vapor deposition method. We measured the electrical resistance across the template before and after oxidation at some temperatures. Also, we had the opportunity to produce various resistances.

We then approximated calculations to measure the electrical resistance of a single nanowire. The results showed that we can produce nanoresistance for electrical circuits in microchips.

Methods

We chose aluminum foil with a purity of 99.999% to make a disc with a diameter of 12 mm and cleaned it by sinking in ultrasonic bath with acetone. After locating the sample in the anodizing reactor and polishing it with perchloric acid and ethanol aqueous solution with a volumetric ratio of 1:4, the voltage (20 V) and current (100 mA/cm²) were applied for 3 min is to obtain a polished and smooth surface. The anodization process was done with the constant voltage regime and in 130 V at 0°C in 0.3-M oxalic acid electrolyte. This method is called hard anodization, and nanoporous anodic alumina was formed.

Anodization for 700 s was done until holes that reached as high as about 40 μm appeared and the thinning process of the barrier layer started. This layer is located at the bottom of the holes and acts as a resistor which prevents ion-electron exchange between the solution and the conductive back part of the template, though it could be penetrated as far as electrical conductance is possible by quantum phenomena and by the thinning barrier layer. This can be done by reducing the anodization voltage step by step. Thinning can be done manually or through programmable device.

The appropriate rates were experimentally obtained through the following process: initially, the voltage was 130 V and was decreased step by step, first, to 40 V by the rate of 3 V in 30 s, then to 20 V by the rate of 2 V in 30 s, to 10 V by 1 V in 30 s, and finally, to 5 V by the rate of 0.5 V in 30 s. A typical curve of anodization at 130 V and subsequent thinning by reducing the voltage to 12 V can be achieved during the process (Figure 2).

Figure 2

A typical curve of anodization at 130 V and thinning to 12 V.

Temperature is also an important factor in the thinning process, and its increase prevents the high drop of the current. Hence, the temperature was gradually and manually increased, and when the voltage reached 40 V, the temperature experimentally increased to 15°C and remained in that value to the end.

Here, the deposition of metallic Zn nanowires, done to fill pores of the template, was done in two ways, by periodic and pulsed chemical electrodeposition. In both methods, the thinning procedure was required to provide electrical connection at the bottom of the holes, but after this stage, further experiment was done in two different methods.

In the pulsed method, appropriate solutions such as 0.4 M ZnSo₄·7H₂O and 0.3 H₃Bo₃ were used. After changing the anodizing acid with the deposition solution inside the reactor and setting up the system, we used the programmable AC/DC power supply, EC1000S model, to generate sine waves ranging from −14 to +4 V, with a relaxation time of 30 s for the deposition of Zn.

The voltage and current-time curves of this process are showed in Figure 3. In this figure, the slope of the charge curve shows the amount of deposition.

Figure 3

Voltage and current-time curves of pulsed electrochemical deposition. The range of voltage is −14 to +4 V with a relaxation time of 30 s, and the used solution is 0.4 M ZnSo₄·7H₂O and 0.3 H₃Bo₃.

In this deposition, the graffiti cathode is placed inside the reactor against the anodized surface of the template. The anode located at the bottom of the holes connected through quantum tunneling with aluminum behind the barrier layer was formed on the template. Deposition was continued for about 1,000 s. The resulting scanning electron microscopy (SEM) image confirms the existence of the nanowires (Figure 4). The XRD pattern confirms it as well (Figure 5).

Figure 4

SEM images obtained from pulsed electrochemical deposition of Zn nanowires in PAA. (a) Arrays of nanowires and (b) some nanowires in bigger magnification.

Figure 5

XRD image of Zn nanowires made by pulsed electrochemical deposition in PAA.

The surface of the sample was colored black after about 400 s, which signifies the filling of pores by Zn in this method. After 1,000 s, the color of sample began to turn silver, which shows the color change of the bulk material.

In the periodic (AC) method, we were able to generate nanowires in different conditions and with different parameters. As an example, for the solution that included 0.3 M ZnSO₄·7H₂O and 0.3 M H₃BO₃, nanowires were formed at different conditions, which resulted in different colors of the surface (Table 2). Better deposition showed a darker color.

Table 2 Different parameters of anodization conditions and deposition in the periodic method in constant solution

The constant solution included 0.3 M ZnSO₄·7H₂O and 0.3 M H₃BO₃. These parameters are needed in order to generate Zn nanowires and corresponding surface colors of the resulting sample.

The SEM image and the corresponding XRD of the resulting sample of this method show the existence of the nanowires (Figures 6 and 7).

Figure 6

SEM images obtained from periodic electrochemical deposition of Zn nanowires in PAA. The images were obtained by removing some alumina from the template surface.

Figure 7

XRD image of Zn nanowires made by periodic electrochemical deposition in PAA.

Eventually, to obtain ZnO nanowires, we put the sample in the oven at different temperatures. We did this procedure without removing the template. The influence of oxygen to the nanowires takes place in the bare surface on top of the nanowires; also, it is due to the excess oxygen that existed in the porous body and around the wire, which had caused oxidation.

We placed the sample, obtained from pulsed deposition, in the furnace with a step-by-step increase in temperature from 100°C to 500°C. For each step, there is a 100°C increase in temperature until 500°C is reached and maintained; the process was done for 15 h. The XRD of the resulting sample shows the existence of ZnO nanowires (Figure 8).

Figure 8

The XRD image of ZnO nanowires made by pulsed electrochemical deposition in PAA. The temperature increased in stages from 100°C to 500°C. For every stage, there was a 100°C increase in temperature until 500°C is reached and maintained; this condition was done for 15 h.

The sample obtained from periodic deposition was placed in the oven for 40 h at 300°C, and the XRD result shows the existence of ZnO nanowires in this case (Figure 9).

Figure 9

XRD image of ZnO nanowires made by periodic electrochemical deposition in PAA. The sample was placed in the oven for 40 h at 300°C.

In these two figures, some peaks of ZnO X-Ray pattern are shown as some of the Zn nanowires that are changed to ZnO nanowires. It should be noted that images were taken on glass and silicon substrates without the total dissolution of the template, but only the back if the aluminum was solved.

Our goal in this work is to fabricate electrical resistance using tiny nanostructure such as nanowires. For this purpose, we used the samples that have been made in the template using pulsed electrodeposition.

In order to make the pores wider and especially increase the pore diameter, during the thinning process and at a voltage of 50 V, we replaced the solution of anodization by 5% phosphoric acid for about 20 min in 30°C. This process helped us to have further deposition, and other existing reasons will be discussed later.

According to the SEM images of previous experiments of deposited samples by electrochemical deposition, we estimated that up to 5% to 10% of pores are filled to the top and covered the surface.

In this experiment, we slowly cleaned the layer that formed on the surface of the template with a suitable cloth and coated a gold layer on it using joule vapor deposition method. The mask is used to prevent the sample from creating a short circuit between the gold and aluminum substrates (Figure 10).

Figure 10

Gold layer coating on PAA filled with Zn nanowires using a mask.

The plated gold is used in order to create an electrical connection for the measurement of electrical resistance across the sample. Also, the penetration of some gold particles into the pores caused to have more nanowires in the circuit that even reached to the sample surface. As mentioned before, the other reason for the widening of pores led to a wider pore mouth, therefore allowing the gold particles to penetrate better into the pores.

After coating the gold on the template, in order to measure the electrical resistance of the desired nanowires, we put a thin copper wire on the gold-covered surface, fixed it with silver glue, and covered all part of the surface with adhesive. The electrical resistance across the width of sample was then measured.

The creation of electric current was due to the transfer of electron flow because of quantum tunneling between the bottom layer Al and Zn nanowires, connecting the gold surface (the wires that are not completely filled did not contribute to the current transfer) and the copper wire.

Because the porous anodic alumina has high electrical resistance and is almost a nonconductive material while zinc is a good conductive material (59 nΩ m in 20°C), we can ignore the electrical resistance of the Zn nanowires. Therefore, it can be assumed that the resistance is only due to the electrical resistance of the barrier layer located under the wires that has thinned to about a few nanometers.

There is a direct relationship between the anodizing voltage and barrier layer thickness with the proportionality constant of 1.3 nm/V [12]; the thickness of this barrier layer is about 15.6 nm. Because it is very thin, there is electron tunneling conductance through it.

Now, we put the sample in a furnace for about 17 h in 100°C. The sample is then taken, and electrical resistance is measured again. We then put it in 200°C, repeat the experiment, and obtain the resulting average of the two measurements (Table 1).