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Tunable Floating Capacitance Multiplier Using Single Fully Balanced Voltage Differencing Buffered Amplifier

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Abstract

An alternative circuit configuration for realizing an electronically adjustable floating capacitance multiplier is presented in this article. By consisting of only one fully balanced-voltage differencing buffered amplifier (FB-VDBA), one resistor and one capacitor, the presented multiplier circuit is canonical structure, and does not require any critical element matching constrain. The equivalent value of the simulated capacitance is adjustable by tuning the bias current of the FB-VDBA. The effect of the FB-VDBA non-idealities on the realized capacitance has been considered in detail. The proposed floating capacitance multiplier has been utilized, as an example application, in the design of a second-order RLC band-pass filter. To support the theory, some computer simulations with PSPICE software are also reported.

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ACKNOWLEDGMENTS

This work is supported by Faculty of Engineering, King Mongkut’s Institute of Technology Ladkrabang (KMITL). The supports in part by Institute of Research and Development Rajamangala University of Technology Isan, and Faculty of Engineering, Rajamangala University of Technology Isan, Khonkaen Campus (contract no. ENG16/61) are also gratefully acknowledged.

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Correspondence to O. Channumsin.

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Tangsrirat, W., Channumsin, O. Tunable Floating Capacitance Multiplier Using Single Fully Balanced Voltage Differencing Buffered Amplifier. J. Commun. Technol. Electron. 64, 797–803 (2019). https://doi.org/10.1134/S1064226919080163

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  • DOI: https://doi.org/10.1134/S1064226919080163

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