Abstract
Interest in the sintering of macroporous silicon is due to the possibility of purposefully modifying its structure. The annealing of macroporous structures in an atmosphere of Ar, instead of H2, simplifies the requirements to equipment and safety engineering. The sintering of macroporous silicon as result of annealing at T = 1000–1280°C in a horizontal tube purged with high-purity gases: Ar or Ar + 3%H2 is examined. Experiments were conducted with layers having deep cylindrical macropores produced by the electrochemical etching of samples with seed pits on their surface (ordered pores) and without seeds (random pores). The morphology of the porous structure and the changes in this structure upon annealing are studied with electron and optical microscopes. It is shown that, depending on the pore diameter and treatment temperature, the following transformation occurs: the pore surface is smoothed, pores are closed and a surface crust is formed, cylindrical pores are spheroidized and decompose into isolated hollow spheres, and a fine structure and faceting are formed. It is shown that the (111) planes have the minimal surface energy. It is found that the annealing of macroporous silicon in an inert gas leads to strong thermal etching, which is manifested in the fact that the porosity increases or even the porous layer at the sample edge fully disappears. Moreover, an oxide layer appears as a film, beads, or long filaments forming a glass wool upon annealing, especially at low temperatures. These features can be attributed to the presence of trace amounts of an oxidizing agent in the inert gas, which causes the formation of highly volatile SiO and products formed in the reaction involving this compound.
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Original Russian Text © E.V. Astrova, N.E. Preobrazhenskiy, S.I. Pavlov, V.B. Voronkov, 2017, published in Fizika i Tekhnika Poluprovodnikov, 2017, Vol. 51, No. 9, pp. 1202–1212.
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Astrova, E.V., Preobrazhenskiy, N.E., Pavlov, S.I. et al. High-temperature annealing of macroporous silicon in an inert-gas flow. Semiconductors 51, 1153–1163 (2017). https://doi.org/10.1134/S1063782617090032
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DOI: https://doi.org/10.1134/S1063782617090032