Fast Methods for Studying the Effect of Electrical Stress on SiO₂ Dielectrics in Metal-Oxide-Semiconductor Field-Effect Transistors

Abstract

This work implements three fast measurement techniques based on the measure–stress–measure (MSM) method. These techniques, namely, measuring–around–${{V}_{{{\text{th}}}}}$, one–point on–the–fly (OTF), and pulsed current-voltage (PIV), were used to characterize three different technologies of metal–oxide–semiconductor field-effect transistors (MOSFETs) with same gate dielectric silicon–dioxide (SiO₂) and various thicknesses ${{t}_{{{\text{ox}}}}}$ = 20 nm, 4 nm, 2.3 nm. Moreover, well–configured electrical stress biasing has been performed to discuss the dielectric degradation of these devices using those characterization techniques. The pros and cons of the used techniques are well discussed based on our results. Furthermore, experimental results showed that threshold voltage shift ($\Delta {{V}_{{{\text{th}}}}}$) follows a power law time dependence with time exponent (n) being 0.16 for molecular hydrogen (H₂) diffusing species and 0.25 for hydrogen atoms (H) diffusing species. We have found that the thicker the SiO₂ dielectric the more the oxide traps (${{N}_{{{\text{ot}}}}}$) contribute to the resulting degradation. However, the dependency between SiO₂ dielectric thickness and oxide traps could not be necessarily linear.