Skip to main content
SpringerLink
Log in

Application of multiple-valued logic in digital technology (Review)

  • Published:
Instruments and Experimental Techniques Aims and scope Submit manuscript

Abstract

Modern trends in the application of multiple-valued logic (MVL) in the design of digital devices are considered. Multiple-valued logic offers wider opportunities for implementation of digital processing algorithms than traditional binary logic. In applied problems, MVL substantially simplifies computational processes, reduces the total number of operations, and can be used to find alternative computational methods, more easily formalize and better understand the problem to be solved, and, finally, discover more efficient ways for solving the problem. Application of multilevel signals in the design of digital devices (such as multilevel or multiple-valued memory modules, arithmetic units, and programmable logic arrays) opens additional opportunities, namely, (i) substantially reduces the number of connections with external devices, which solves the so-called pin-out problem; (ii) reduces the number of ripple-through carriers used in the process of realization of arithmetic operations (normal binary addition or subtraction); and (iii) increases the packing density.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Gulak, G., Abstracts of Papers, Proc. XXVIII Int. Symp. Multiple-Valued Logic, 1998, p. 222.

  2. Hurst, S.L., IEEE Trans. Comput., 1984, vol. C-33, no. 12, p. 1160.

    Google Scholar 

  3. Smith, K.C., IEEE Trans. on Comp., 1981, vol. C-30, no. 9, p. 619.

    Google Scholar 

  4. Yablonskii, S.V., Tr. Mat. Inst. im. V.A. Steklova, 1958, vol. LI.

  5. Brayton, R.K. and Khatri, S.P., Abstracts of Papers, Proc. XII Int. Conf. VLSI Design, 1999, p. 196.

  6. Etiemble, D. and Israel, M., Computer, 1988, vol. 21, no. 4, p. 28.

    Article  Google Scholar 

  7. Krasnikov, N.V. and Matveev, V.A., Usp. Fiz. Nauk, 2004, vol. 174, p. 697 [Phys. Usp. (Engl. Transl.), vol. 47, p. 643].

    Article  Google Scholar 

  8. Kalinnikov, V., Krastev, V., and Nikityuk, N., Preprint of Joint Institute for Nuclear Research, Dubna, 1984, no. R11-84-234.

  9. Sheikholeslami, A., Abstracts of Papers, Proc. XXVIII Int. Symp. Multiple-Valued Logic, 1998, p. 264.

  10. Tharus, S. and Wong, D., Abstracts of Papers, Proc. III Int. Symp. FPGAs, California, 1995, p. 3.

  11. Brayton, R.K. and Khatri, S.P., Abstracts of Papers, Proc. XXI Int. Conf. on VLSI Design, 1999, p. 196.

  12. Murgai, R., Shenoy, N., Brayton, R., et al., Abstracts of Papers, Proc. Int. Conf. on Computer-Aided Design (ICCAD), 1991, p. 564.

  13. Toshich, Zh., Izv. Akad. Nauk SSSR, Tekh. Kibern., 1967, no. 3, p. 113.

  14. Pradhan, D.K., IEEE Trans. Comput., 1978, vol. C-27, no. 3, p. 239.

    MathSciNet  Google Scholar 

  15. Menger, K.S., IEEE Trans. Comput., 1969, vol. C-18, no. 2, p. 241.

    MathSciNet  Google Scholar 

  16. Wesselkamper, T.C., IEEE Trans. Comput., 1978, vol. C-27, no. 3, p. 232.

    MathSciNet  Google Scholar 

  17. Crawford, J., Daum, M., Kalinnikov, V., et al., Nucl. Instrum. Methods Phys. Res. A, 2004, vol. 526, p. 300.

    Article  ADS  Google Scholar 

  18. Varma, D. and Trachtenberg, E.A., Kluwer Int. Ser. Eng. Comput. Sci., 1993, vol. 212, p. 215.

    Google Scholar 

  19. Pollard, J., Math. Comput., 1974, no. 25, p. 365.

  20. Makklellan, Dzh.Kh. and Reider, Ch.M., Primenenie teorii chisel v tsifrovoi obrabotke signalov (Number Theory in Digital Signal Processing), Moscow: Radio i Svyaz’, 1983.

    Google Scholar 

  21. Kalinnikov, V., Preprint of Joint Institute for Nuclear Research, Dubna, 1988, R11-88-320.

  22. Nikityuk, N., Preprint of Joint Institute for Nuclear Research, Dubna, 1980, no. R11-80-484.

  23. Kalinnikov, V. and Nikityuk, N.A., USSR Inventor’s Certificate no. 1075829, Byull. Izobret., 1984, no. 11.

  24. Kalinnikov, V., Nikityuk, N., and Gaidamaka, R., Preprint of Joint Institute for Nuclear Research, Dubna, 1982, no. R13-82-628.

  25. Chang, Y.H. and Butler, J.T., Abstracts of Papers, Proc. XII Int. Conf. on VLSI Design, 1991, p. 130.

  26. Nozoe, A., Kotani, H., and Tsujikawa, T., Abstracts of Papers, Proc. of 1999 IEEE Int. Solid-State Circuits Conference (ISSCC’99), 1999, p. 1544.

  27. Jung, T.S., Choi, Y.J., Suh, K.D., and Suh, B.H., IEEE J. Solid-State Circuits, 1996, vol. 31, no. 11, p. 1575.

    Article  Google Scholar 

  28. Okuda, T. and Murotani, T., IEEE J. Solid-State Circuits, 1997, vol. 32, no. 11, p. 1743.

    Article  Google Scholar 

  29. Tran, H.V., Abstracts of Papers, Proc. of 1996 IEEE Int. Solid-State Circuits Conference (ISSCC’96), 1996, p. 270.

  30. Chan, H.L., Mohan, S., Mazumder, P., and Haddad, G.I., IEEE J. Solid-State Circuits, 1996, vol. 31, no. 8, p. 1151.

    Article  Google Scholar 

  31. Wei, S. Lin, H.C., et al., IEEE J. Solid-State Circuits, 1993, vol. 28, p. 697.

    Article  Google Scholar 

  32. Tang, H. and Lin, H.C., Abstracts of Papers, Proc. XXVI Int. Symp. Multiple-Valued Logic, 1996, p. 230.

Download references

Author information

Authors and Affiliations

  1. Joint Institute for Nuclear Research, ul. Joliot Curie 6, Dubna Moscow oblast, 141980, Russia

    V. A. Kalinnikov

Authors
  1. V. A. Kalinnikov
    View author publications

    You can also search for this author in PubMed Google Scholar

Additional information

Original Russian Text © V.A. Kalinnikov, 2006, published in Pribory i Tekhnika Eksperimenta, 2006, No. 6, pp. 5–14.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Kalinnikov, V.A. Application of multiple-valued logic in digital technology (Review). Instrum Exp Tech 49, 743–751 (2006). https://doi.org/10.1134/S0020441206060017

Download citation

  • Received:

  • Accepted:

  • Issue Date:

  • DOI: https://doi.org/10.1134/S0020441206060017

PACS numbers

Search

Navigation