Abstract
A memory element based on a Si/CaF2 periodic nanostructure is proposed. In this element, information is recorded through charge capture by trap states in a CaF2 dielectric. The high and low signal levels correspond to the current in the maximum and minimum of the negative differential resistance region, which forms as a result of the resonant tunnel distribution of charge carriers over trap levels in the dielectric. The speed of such logical elements depends on the rate of activation carrier trapping and the rate of tunnel carrier transfer from one state to another. It is shown that both Si/CaF2-based logical elements and memory elements proposed operate at temperatures from 77 to 300 K, have a switching time of 10−12–10−10 s, and are compatible with silicon IC technology.
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Translated from Zhurnal Tekhnichesko\(\overset{\lower0.5em\hbox{$\smash{\scriptscriptstyle\smile}$}}{l} \) Fiziki, Vol. 73, No. 1, 2003, pp. 67–72.
Original Russian Text Copyright © 2003 by Berashevich, Korolev, Danilyuk, Borisenko.
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Berashevich, Y.A., Korolev, A.V., Danilyuk, A.L. et al. Memory element based on Si/CaF2 periodic nanostructures. Tech. Phys. 48, 63–67 (2003). https://doi.org/10.1134/1.1538729
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DOI: https://doi.org/10.1134/1.1538729