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An 8-bit Folding A/D Converter with a New Interpolation Technique

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Abstract

This paper proposes a new interpolation technique for application in a folding A/D converter with interpolation. However, there is not a specific interpolation circuit because this interpolation technique is applied to the folding encoder circuit and to the master latches of the A/D converter. This interpolation technique adds some transistors in the folding encoder circuit, and it adds only three transistors to some master latches. An 8-bit A/D converter has been designed and implemented in a 0.8 μm BiCMOS process, at F T of 12 GHz to evaluate the proposed interpolation technique.

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Authors and Affiliations

  1. Department of Electrical Engineering—DEL/CCET, Federal University of Mato Grosso do Sul—UFMS, Cidade Universitaria, P.O. Box 549, 79070-900—Campo Grande/MS, Brazil

    Evandro Mazina Martins & Elnatan Chagas Ferreira

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  1. Evandro Mazina Martins
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  2. Elnatan Chagas Ferreira
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Martins, E.M., Ferreira, E.C. An 8-bit Folding A/D Converter with a New Interpolation Technique. Analog Integrated Circuits and Signal Processing 41, 237–252 (2004). https://doi.org/10.1023/B:ALOG.0000041639.50084.96

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  • DOI: https://doi.org/10.1023/B:ALOG.0000041639.50084.96

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