Abstract
This paper describes a novel noise-shaping Δ-Σ modulator for D/A-conversion which has no global feedback. The proposed topology is well suited for a pipelined clocking scheme allowing increased oversampling ratios for both first and higher order modulators. The maximum clock-frequency of the new modulator is limited only by the delay through one single accumulator regardless of modulator order, which represents a huge saving compared to the conventional modulator. The converter is very modular and scales easily to higher modulator orders. Still the proposed topology is mathematically equivalent to the classical Δ-Σ modulator. Theoretical analysis and circuit simulations for a first- and second-order modulator are presented. The first-order circuit has been implemented in a FPGA-circuit from Altera and measured results are presented.
Similar content being viewed by others
References
S.R. Norsworthy, R. Schreier, and G.C. Temes, Delta-Sigma Data Converters. IEEE Press, New Jersey, 1997.
G.R. Ritchie et al., “Interpolative digital to analog converters.” IEEE Transactions on Communications,vol. COM-22, pp. 1797–1806, Nov. 1974.
J.C. Candy et al., “Double interpolation for digital-to-analog conversion.” IEEE Transactions on Communication,vol. COM-34, pp. 77–81, Jan., 1986.
S.R. Norsworthy et al., “Aminimal multi-bit digital noise shaping architecture.” Proceedings International Symposium on Circuits and Systems, pp. I-5-I-8, May, 1996.
D.T. Wisland et al., “A new scalable non-feedback delta-sigma digital-to-analog converter.” In Proceedings 9th International Conference on Electronics, Circuits and Systems (ICECS), pp. 331–334, Sep., 2002.
W. Chou and R.M. Gray, “Modulo sigma-delta modulation.” IEEE Transactions on Communications, vol. 40, no. 8, pp. 1388–1395, Aug. 1992.
M. Høvin et al., “Delta-sigma modulators using frequency-modulated intermediate values.” IEEE Journal of Solid-State Circuits, vol. 32, no. 1, pp. 13–22, Jan. 1997.
N. He, F. Kuhlmann, and A. Buzo, “Double-loop sigma-delta modulation with dc input.” IEEE Transactions on Communications, vol. 38, no. 4, pp. 487–495, 1990.
K. Falakshahi, C.K.K. Yang, and B.A. Wooley, “A 14-bit, 10-Msamples/s D/A converter using multibit Δ-Σ modulation.” IEEE Journal of Solid-State Circuits,vol. 34, no. 5, pp. 607–615, 1999.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Wisland, D.T., Høvin, M.E. & Lande, T.S. A Non-Feedback Δ-Σ Modulator for Digital-to-Analog Conversion Using Digital Frequency Modulation. Analog Integrated Circuits and Signal Processing 41, 209–222 (2004). https://doi.org/10.1023/B:ALOG.0000041637.75702.c3
Issue Date:
DOI: https://doi.org/10.1023/B:ALOG.0000041637.75702.c3