Abstract
High-Level Test Synthesis (HLTS), a term introduced in recent years, promises automatic enhancement of testability of a circuit. In this paper we will show how HLTS can achieve higher testability for BIST-oriented test methodologies. Our results show considering testability during high-level synthesis, better testability can be obtained when compared to DFT at low level. Transformation for testability, which allows behavioral modification for testability, is a very powerful HLTS technique.
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Papachristou, C.A., Baklashov, M. & Lai, K. High-Level Test Synthesis for Behavioral and Structural Designs. Journal of Electronic Testing 13, 167–188 (1998). https://doi.org/10.1023/A:1008309921888
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DOI: https://doi.org/10.1023/A:1008309921888