Abstract
A hierarchical methodology for analog behavioral modeling of the basic building blocks of neural networks is presented using HDL-A.1 This hierarchy is formed of three levels in order to satisfy the different requirements of the CAD tools which may incorporate the models. The presented models include all the nonidealities present in the actual circuit in addition to being flexible and consuming shorter simulation time. This improvement in simulation time is verified through examples at both the circuit and system levels.
Similar content being viewed by others
References
H. Mantooth and M. Fiegenbaum. Modeling with an Analog Hardware Description Language. Kluwer, Norwell, MA, 1995.
E. Liu and A. Vincentelli. “Behavioral representations for VCO and Detectors in Phase-Lock Systems.” IEEE 1992 Custom Integrated Circuits Conference.
M. Glesner and W. Pöchmüller. Neurocomputers An Overview of Neural Networks in VLSI. Chapman & Hall, London, 1994.
C. Mead and M. Ismail, eds. Analog VLSI Implementation of Neural Systems. Kluwer, Norwell, MA, 1990.
Jacek M. Zurada. Introduction to Artificial Neural systems. West Publishing company, 1992.
A. Cichocki and R. Unbehauen. Neural Networks for Optimization and Signal Processing. Wiley, New York, 1993.
J. Van der Spiegel, P. Mueller, D. Blackman, P. Chance, C. Donham, R. Etienne-Cummings, and P. Kinget. “An analog neural computer with modular architecture for real-time dynamic computations.” IEEE J. Solid-State Circuits SC-27, pp. 82–92, 1992.
S. Gowda, B. Sheu, J. Choi, C. Hwang, and J. Cable. “Design and Characterization of Analog VLSI Neural Network Modules.” IEEE J. Solid-State Circuits 28, pp. 301–312, 1993.
J. Choi, S. Bang, and B. Sheu. “A programmable Analog VLSI Neural Network Processor for Communication Receivers.” IEEE Trans. Neural Networks 4, pp. 484–494, 1993.
A. Andreou, K. Boahen, P. Pouliquen, A. Pavasovic, R. Jenkins, and K. Strohbehn. “Current-Mode Subthreshold MOS Circuits for Analog VLSI Neural Systems.” IEEE Trans. Neural Networks 2, pp. 205–213, 1991.
B. Barranco, E. Sanchez-Sinencio, A. Rodriguez-Vazquez, and J. Huertas. “A Modular T-Mode Design Approach for Analog Neural Network Hardware Implementations.” IEEE J. Solid-State Circuits 27, pp. 701–712, 1992.
F. Kub, K. Moon, I. Mack, and F. Long. “Programmable Analog Vector-Matrix Multipliers.” IEEE J. Solid-State Circuits 25, pp. 207–214, 1990.
P. Hollis and J. Paulos. “Artificial Neural Networks Using MOS Analog Multipliers.” IEEE J. Solid-State Circuits 25, pp. 849–855, 1990.
N. Saxena and J. Clark. “A Four-Quadrant CMOS Analog Multiplier for Analog Neural Networks.” IEEE J. Solid-State Circuits 29, pp. 746–749, 1994.
C. Mead. Analog VLSI and Neural Systems. Addison-Wesley, Reading, MA, 1989.
M. Ismail and J. Franca, eds. Introduction to Analog VLSI Design Automation. Kluwer, Norwell, MA, 1990.
A. M. Abdelatty, H. Haddara, and H. F. Ragaie. “Analog Behavioral Modeling of Artificial Neural Networks.” Proc. ICM'94 pp. 140–143.
M. Elmasry, eds. VLSI Artificial Neural Networks Engineering. Kluwer, Norwell, MA, 1994.
E. Sanchez-Sinencio. “A Unified Enviroment for High-Performance Analog Signal Processing.” Proc. ICM'94, pp. S49-S49.
Randall L. Geiger, Phillip E. Allen, and Noel R. Strader. VLSI Design Techniques for Analog and Digital Circuits. McGraw Hill, 1990.
B. Sheu and J. Choi. Neural Information Processing and VLSI. Kluwer, Norwell, MA, 1995.
S. Watkins, P. Chau, and R. Tawel. “A radial basis function neurocomputer implemented with analog VLSI circuits.” Proc. IEEE/INNS Inter. Joint Conf. Neural Networks 2, pp. 607–612, 1992.
A. Andreou, K. Boahen, P. Pouliquen. A. Pavasovic, and K. Strohbehn. “Current-Mode Subthrehold MOS Circuits for Analog VLSI Neural Systems.” IEEE Trans. Neural networks 2, pp. 205–213, 1991.
HDL-A user manual.
B. Kosko. Neural Networks for Signal Processing. Prentice Hall, 1992.
M. Tan. “Synthesis of Artificial Neural Networks by Transconductances Only.” Analog Integrated Circuits and Signal Processing 1, pp. 339–350, 1991.
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Ahmed, M.M., Haddara, H. & Ragaie, H.F. Hierarchical Analog Behavioral Modeling of Artificial Neural Networks. Analog Integrated Circuits and Signal Processing 16, 121–139 (1998). https://doi.org/10.1023/A:1008215706267
Issue Date:
DOI: https://doi.org/10.1023/A:1008215706267