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Consistent Performance ZnO TFT Based Single Transistor Nonvolatile Memory with Minimal Charge Loss

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Abstract

This article reports transparent bottom gate ZnO TFT based single transistor nonvolatile memory (NVM). Here current voltage hysteresis of this TFT structure has been thoroughly explored, where acceptor trap in the channel captures electrons during forward scanning resulting into threshold voltage hike in reverse scanning. This mobile charge carrier capture and release at the channel and oxide interface have been implicated in hysteresis. Additionally, it is validated using different geometrical and device parameter variations of TFT, such as channel length, temperature variation, oxide thickness, and energy level. The current ION/IOFF ratio was found to be in the range of ~ 109, which was responsible for the rapid switching memory speed. In addition, it was observed that the threshold voltage is impacted by programming and erase operations for various time steps. Moreover, the prospective use of the proposed NVM had a retention time for memory more than 10 years.

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Authors and Affiliations

  1. Solid State Electronics and VLSI Lab, Department of ECE, NIT Jamshedpur, Jharkhand, India

    Binay Binod Kumar & Kunal Singh

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  1. Binay Binod Kumar
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  2. Kunal Singh
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Contributions

Binay Binod Kumar, Solid State Electronics and VLSI Design Lab, Department of ECE, NIT Jamshedpur, Jharkhand, carried out TCAD simulation reported in paper, manuscript preparation. Dr. Kunal Singh, Solid State Electronics and VLSI Design Lab, Department of ECE, NIT Jamshedpur, Jharkhand, final draft of manuscript check and made graphs

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Correspondence to Kunal Singh.

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All authors have participated in (a) conception and design, or analysis and interpretation of the data; (b) drafting the article or revising it critically for important intellectual content; and (c) approval of the final version. This manuscript has not been submitted to, nor is under review at, another journal or other publishing venue. The authors have no affiliation with any organization with a direct or indirect financial interest in the subject matter discussed in the manuscript. The following authors have affiliations with organizations with direct or indirect financial interest in the subject matter discussed in the manuscript: Binay Binod Kumar, Solid State Electronics and VLSI Lab, Department of ECE, NIT Jamshedpur, Jharkhand. Dr. Kunal Singh, Solid State Electronics and VLSI Lab, Department of ECE, NIT Jamshedpur, Jharkhand.

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Kumar, B.B., Singh, K. Consistent Performance ZnO TFT Based Single Transistor Nonvolatile Memory with Minimal Charge Loss. Trans. Electr. Electron. Mater. (2024). https://doi.org/10.1007/s42341-024-00519-2

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