Abstract
The double-star chopper cell modular multilevel converter (DSCC-MMC) has been employed in several applications as HVDC, energy storage, renewable energy, electrical drives and STATCOMs. Generally, the DSCC-MMC main circuit parameter design presented in literature considers balanced currents flowing through the converter. Nevertheless, in STATCOM application, the converter can compensate negative sequence components and unbalanced currents flow through the DSCC-MMC, resulting in different stresses in the converter phases. Therefore, this work presents a detailed design methodology of the DSCC-MMC main circuit parameters, considering both positive and negative sequence current compensations. The dc-link voltage, number of submodules, power semiconductor thermal stresses, submodule capacitance and arm inductances are designed. Expressions for the energy storage requirements are derived when negative sequence is compensated. A case study considering a 15-MVA STATCOM is presented, and simulation results validate the proposed design methodology. Finally, the converter power losses and thermal stresses in the power semiconductors are evaluated.
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Notes
For example, when \(f_c\) = 210 Hz and \(f_n\) = 60 Hz, \(f'_c/f'_n\) = 7/2. Therefore, \(f'_c = 7\) and \(f'_n = 2\). Therefore, \(1/f_{ma} = 2/f_n\).
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The authors would like to thank the Brazilian agencies FAPEMIG, CAPES and CNPq by funding.
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Cupertino, A.F., Farias, J.V.M., Pereira, H.A. et al. DSCC-MMC STATCOM Main Circuit Parameters Design Considering Positive and Negative Sequence Compensation. J Control Autom Electr Syst 29, 62–74 (2018). https://doi.org/10.1007/s40313-017-0349-4
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DOI: https://doi.org/10.1007/s40313-017-0349-4